Commit b5cf0647 authored by Nikola Cornij's avatar Nikola Cornij Committed by Alex Deucher
Browse files

drm/amd/display: config to override DSC start slice height 



[why]
It's sometimes useful to have this option when debugging

[how]
Add a config flag. If the flag is not set, use driver default policy.
If the flag is set, use the value from the flag as the starting DSC slice
height.

Signed-off-by: default avatarNikola Cornij <nikola.cornij@amd.com>
Reviewed-by: default avatarMartin Leung <Martin.Leung@amd.com>
Acked-by: default avatarBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 48f100a0

drivers/gpu/drm/amd/display/dc/dc.h

+1 −0
Original line number Diff line number Diff line
@@ -347,6 +347,7 @@ struct dc_debug_options { 
	bool disable_hubp_power_gate;

#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT

	bool disable_dsc_power_gate;

	int dsc_min_slice_height_override;

#endif

	bool disable_pplib_wm_range;

	enum wm_report_mode pplib_wm_report_mode;

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

+8 −6
Original line number Diff line number Diff line
@@ -512,6 +512,7 @@ static bool setup_dsc_config( 
		const struct dsc_enc_caps *dsc_enc_caps,

		int target_bandwidth_kbps,

		const struct dc_crtc_timing *timing,

		int min_slice_height_override,

		struct dc_dsc_config *dsc_cfg)

{

	struct dsc_enc_caps dsc_common_caps;
@@ -680,7 +681,10 @@ static bool setup_dsc_config( 


	// Slice height (i.e. number of slices per column): start with policy and pick the first one that height is divisible by.

	// For 4:2:0 make sure the slice height is divisible by 2 as well.

	if (min_slice_height_override == 0)

		slice_height = min(dsc_policy.min_sice_height, pic_height);

	else

		slice_height = min(min_slice_height_override, pic_height);



	while (slice_height < pic_height && (pic_height % slice_height != 0 ||

		(timing->pixel_encoding == PIXEL_ENCODING_YCBCR420 && slice_height % 2 != 0)))
@@ -820,10 +824,8 @@ bool dc_dsc_compute_bandwidth_range( 
			timing->pixel_encoding, &dsc_common_caps);



	if (is_dsc_possible)

		is_dsc_possible = setup_dsc_config(dsc_sink_caps,

				&dsc_enc_caps,

				0,

				timing, &config);

		is_dsc_possible = setup_dsc_config(dsc_sink_caps, &dsc_enc_caps, 0, timing,

					dc->debug.dsc_min_slice_height_override, &config);



	if (is_dsc_possible)

		get_dsc_bandwidth_range(min_bpp, max_bpp, &dsc_common_caps, timing, range);
@@ -845,7 +847,7 @@ bool dc_dsc_compute_config( 
	is_dsc_possible = setup_dsc_config(dsc_sink_caps,

			&dsc_enc_caps,

			target_bandwidth_kbps,

			timing, dsc_cfg);

			timing, dc->debug.dsc_min_slice_height_override, dsc_cfg);

	return is_dsc_possible;

}

#endif /* CONFIG_DRM_AMD_DC_DSC_SUPPORT */

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