Commit b5b0c7f4 authored by Vladimir Oltean's avatar Vladimir Oltean Committed by David S. Miller
Browse files

net: dsa: sja1105: Remove duplicate rgmii_pad_mii_tx from regs 



The pad_mii_tx registers point to the same memory region but were
unused. So convert to using these for RGMII I/O cell configuration, as
they bear a shorter name.

Signed-off-by: default avatarVladimir Oltean <olteanv@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 283da99a

drivers/net/dsa/sja1105/sja1105.h

+1 −1
Original line number Diff line number Diff line
@@ -35,8 +35,8 @@ struct sja1105_regs { 
	u64 ptptsclk;

	u64 ptpegr_ts[SJA1105_NUM_PORTS];

	u64 pad_mii_tx[SJA1105_NUM_PORTS];

	u64 pad_mii_id[SJA1105_NUM_PORTS];

	u64 cgu_idiv[SJA1105_NUM_PORTS];

	u64 rgmii_pad_mii_tx[SJA1105_NUM_PORTS];

	u64 mii_tx_clk[SJA1105_NUM_PORTS];

	u64 mii_rx_clk[SJA1105_NUM_PORTS];

	u64 mii_ext_tx_clk[SJA1105_NUM_PORTS];

drivers/net/dsa/sja1105/sja1105_clocking.c

+1 −1
Original line number Diff line number Diff line
@@ -373,7 +373,7 @@ static int sja1105_rgmii_cfg_pad_tx_config(struct sja1105_private *priv, 
	sja1105_cfg_pad_mii_tx_packing(packed_buf, &pad_mii_tx, PACK);



	return sja1105_spi_send_packed_buf(priv, SPI_WRITE,

					   regs->rgmii_pad_mii_tx[port],

					   regs->pad_mii_tx[port],

					   packed_buf, SJA1105_SIZE_CGU_CMD);

}

drivers/net/dsa/sja1105/sja1105_spi.c

+2 −4
Original line number Diff line number Diff line
@@ -500,11 +500,10 @@ static struct sja1105_regs sja1105et_regs = { 
	.port_control = 0x11,

	.config = 0x020000,

	.rgu = 0x100440,

	/* UM10944.pdf, Table 86, ACU Register overview */

	.pad_mii_tx = {0x100800, 0x100802, 0x100804, 0x100806, 0x100808},

	.rmii_pll1 = 0x10000A,

	.cgu_idiv = {0x10000B, 0x10000C, 0x10000D, 0x10000E, 0x10000F},

	/* UM10944.pdf, Table 86, ACU Register overview */

	.rgmii_pad_mii_tx = {0x100800, 0x100802, 0x100804, 0x100806, 0x100808},

	.mac = {0x200, 0x202, 0x204, 0x206, 0x208},

	.mac_hl1 = {0x400, 0x410, 0x420, 0x430, 0x440},

	.mac_hl2 = {0x600, 0x610, 0x620, 0x630, 0x640},
@@ -530,11 +529,10 @@ static struct sja1105_regs sja1105pqrs_regs = { 
	.port_control = 0x12,

	.config = 0x020000,

	.rgu = 0x100440,

	/* UM10944.pdf, Table 86, ACU Register overview */

	.pad_mii_tx = {0x100800, 0x100802, 0x100804, 0x100806, 0x100808},

	.rmii_pll1 = 0x10000A,

	.cgu_idiv = {0x10000B, 0x10000C, 0x10000D, 0x10000E, 0x10000F},

	/* UM10944.pdf, Table 86, ACU Register overview */

	.rgmii_pad_mii_tx = {0x100800, 0x100802, 0x100804, 0x100806, 0x100808},

	.mac = {0x200, 0x202, 0x204, 0x206, 0x208},

	.mac_hl1 = {0x400, 0x410, 0x420, 0x430, 0x440},

	.mac_hl2 = {0x600, 0x610, 0x620, 0x630, 0x640},

CRA Git | Maintained and supported by SUSTech CRA and CCSE