Commit b5904972 authored by Scott Wood's avatar Scott Wood Committed by Avi Kivity
Browse files

KVM: PPC: Paravirtualize SPRG4-7, ESR, PIR, MASn 



This allows additional registers to be accessed by the guest
in PR-mode KVM without trapping.

SPRG4-7 are readable from userspace.  On booke, KVM will sync
these registers when it enters the guest, so that accesses from
guest userspace will work.  The guest kernel, OTOH, must consistently
use either the real registers or the shared area between exits.  This
also applies to the already-paravirted SPRG3.

On non-booke, it's not clear to what extent SPRG4-7 are supported
(they're not architected for book3s, but exist on at least some classic
chips).  They are copied in the get/set regs ioctls, but I do not see any
non-booke emulation.  I also do not see any syncing with real registers
(in PR-mode) including the user-readable SPRG3.  This patch should not
make that situation any worse.

Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
Signed-off-by: default avatarAlexander Graf <agraf@suse.de>
Signed-off-by: default avatarAvi Kivity <avi@redhat.com>
parent 940b45ec

arch/powerpc/include/asm/kvm_e500.h

+0 −8
Original line number Diff line number Diff line
@@ -71,14 +71,6 @@ struct kvmppc_vcpu_e500 { 
	u32 pid[E500_PID_NUM];

	u32 svr;



	u32 mas0;

	u32 mas1;

	u32 mas2;

	u64 mas7_3;

	u32 mas4;

	u32 mas5;

	u32 mas6;



	/* vcpu id table */

	struct vcpu_id_table *idt;

arch/powerpc/include/asm/kvm_host.h

+0 −6
Original line number Diff line number Diff line
@@ -318,10 +318,6 @@ struct kvm_vcpu_arch { 
	u32 vrsave; /* also USPRG0 */

	u32 mmucr;

	ulong shadow_msr;

	ulong sprg4;

	ulong sprg5;

	ulong sprg6;

	ulong sprg7;

	ulong csrr0;

	ulong csrr1;

	ulong dsrr0;
@@ -329,7 +325,6 @@ struct kvm_vcpu_arch { 
	ulong mcsrr0;

	ulong mcsrr1;

	ulong mcsr;

	ulong esr;

	u32 dec;

	u32 decar;

	u32 tbl;
@@ -338,7 +333,6 @@ struct kvm_vcpu_arch { 
	u32 tsr;

	u32 ivor[64];

	ulong ivpr;

	u32 pir;

	u32 pvr;



	u32 shadow_pid;

arch/powerpc/include/asm/kvm_para.h

+29 −2
Original line number Diff line number Diff line
@@ -33,11 +33,35 @@ struct kvm_vcpu_arch_shared { 
	__u64 sprg3;

	__u64 srr0;

	__u64 srr1;

	__u64 dar;

	__u64 dar;		/* dear on BookE */

	__u64 msr;

	__u32 dsisr;

	__u32 int_pending;	/* Tells the guest if we have an interrupt */

	__u32 sr[16];

	__u32 mas0;

	__u32 mas1;

	__u64 mas7_3;

	__u64 mas2;

	__u32 mas4;

	__u32 mas6;

	__u32 esr;

	__u32 pir;



	/*

	 * SPRG4-7 are user-readable, so we can only keep these consistent

	 * between the shared area and the real registers when there's an

	 * intervening exit to KVM.  This also applies to SPRG3 on some

	 * chips.

	 *

	 * This suffices for access by guest userspace, since in PR-mode

	 * KVM, an exit must occur when changing the guest's MSR[PR].

	 * If the guest kernel writes to SPRG3-7 via the shared area, it

	 * must also use the shared area for reading while in kernel space.

	 */

	__u64 sprg4;

	__u64 sprg5;

	__u64 sprg6;

	__u64 sprg7;

};



#define KVM_SC_MAGIC_R0		0x4b564d21 /* "KVM!" */
@@ -49,6 +73,9 @@ struct kvm_vcpu_arch_shared { 


#define KVM_MAGIC_FEAT_SR		(1 << 0)



/* MASn, ESR, PIR, and high SPRGs */

#define KVM_MAGIC_FEAT_MAS0_TO_SPRG7	(1 << 1)



#ifdef __KERNEL__



#ifdef CONFIG_KVM_GUEST

arch/powerpc/kernel/asm-offsets.c

+11 −4
Original line number Diff line number Diff line
@@ -426,16 +426,23 @@ int main(void) 
	DEFINE(VCPU_SPRG2, offsetof(struct kvm_vcpu, arch.shregs.sprg2));

	DEFINE(VCPU_SPRG3, offsetof(struct kvm_vcpu, arch.shregs.sprg3));

#endif

	DEFINE(VCPU_SPRG4, offsetof(struct kvm_vcpu, arch.sprg4));

	DEFINE(VCPU_SPRG5, offsetof(struct kvm_vcpu, arch.sprg5));

	DEFINE(VCPU_SPRG6, offsetof(struct kvm_vcpu, arch.sprg6));

	DEFINE(VCPU_SPRG7, offsetof(struct kvm_vcpu, arch.sprg7));

	DEFINE(VCPU_SHARED_SPRG4, offsetof(struct kvm_vcpu_arch_shared, sprg4));

	DEFINE(VCPU_SHARED_SPRG5, offsetof(struct kvm_vcpu_arch_shared, sprg5));

	DEFINE(VCPU_SHARED_SPRG6, offsetof(struct kvm_vcpu_arch_shared, sprg6));

	DEFINE(VCPU_SHARED_SPRG7, offsetof(struct kvm_vcpu_arch_shared, sprg7));

	DEFINE(VCPU_SHADOW_PID, offsetof(struct kvm_vcpu, arch.shadow_pid));

	DEFINE(VCPU_SHADOW_PID1, offsetof(struct kvm_vcpu, arch.shadow_pid1));

	DEFINE(VCPU_SHARED, offsetof(struct kvm_vcpu, arch.shared));

	DEFINE(VCPU_SHARED_MSR, offsetof(struct kvm_vcpu_arch_shared, msr));

	DEFINE(VCPU_SHADOW_MSR, offsetof(struct kvm_vcpu, arch.shadow_msr));



	DEFINE(VCPU_SHARED_MAS0, offsetof(struct kvm_vcpu_arch_shared, mas0));

	DEFINE(VCPU_SHARED_MAS1, offsetof(struct kvm_vcpu_arch_shared, mas1));

	DEFINE(VCPU_SHARED_MAS2, offsetof(struct kvm_vcpu_arch_shared, mas2));

	DEFINE(VCPU_SHARED_MAS7_3, offsetof(struct kvm_vcpu_arch_shared, mas7_3));

	DEFINE(VCPU_SHARED_MAS4, offsetof(struct kvm_vcpu_arch_shared, mas4));

	DEFINE(VCPU_SHARED_MAS6, offsetof(struct kvm_vcpu_arch_shared, mas6));



	/* book3s */

#ifdef CONFIG_KVM_BOOK3S_64_HV

	DEFINE(KVM_LPID, offsetof(struct kvm, arch.lpid));

arch/powerpc/kernel/kvm.c

+171 −33
Original line number Diff line number Diff line
@@ -49,23 +49,17 @@ 
#define KVM_RT_30		0x03c00000

#define KVM_MASK_RB		0x0000f800

#define KVM_INST_MFMSR		0x7c0000a6

#define KVM_INST_MFSPR_SPRG0	0x7c1042a6

#define KVM_INST_MFSPR_SPRG1	0x7c1142a6

#define KVM_INST_MFSPR_SPRG2	0x7c1242a6

#define KVM_INST_MFSPR_SPRG3	0x7c1342a6

#define KVM_INST_MFSPR_SRR0	0x7c1a02a6

#define KVM_INST_MFSPR_SRR1	0x7c1b02a6

#define KVM_INST_MFSPR_DAR	0x7c1302a6

#define KVM_INST_MFSPR_DSISR	0x7c1202a6



#define KVM_INST_MTSPR_SPRG0	0x7c1043a6

#define KVM_INST_MTSPR_SPRG1	0x7c1143a6

#define KVM_INST_MTSPR_SPRG2	0x7c1243a6

#define KVM_INST_MTSPR_SPRG3	0x7c1343a6

#define KVM_INST_MTSPR_SRR0	0x7c1a03a6

#define KVM_INST_MTSPR_SRR1	0x7c1b03a6

#define KVM_INST_MTSPR_DAR	0x7c1303a6

#define KVM_INST_MTSPR_DSISR	0x7c1203a6



#define SPR_FROM		0

#define SPR_TO			0x100



#define KVM_INST_SPR(sprn, moveto) (0x7c0002a6 | \

				    (((sprn) & 0x1f) << 16) | \

				    (((sprn) & 0x3e0) << 6) | \

				    (moveto))



#define KVM_INST_MFSPR(sprn)	KVM_INST_SPR(sprn, SPR_FROM)

#define KVM_INST_MTSPR(sprn)	KVM_INST_SPR(sprn, SPR_TO)



#define KVM_INST_TLBSYNC	0x7c00046c

#define KVM_INST_MTMSRD_L0	0x7c000164
@@ -440,56 +434,191 @@ static void kvm_check_ins(u32 *inst, u32 features) 
	case KVM_INST_MFMSR:

		kvm_patch_ins_ld(inst, magic_var(msr), inst_rt);

		break;

	case KVM_INST_MFSPR_SPRG0:

	case KVM_INST_MFSPR(SPRN_SPRG0):

		kvm_patch_ins_ld(inst, magic_var(sprg0), inst_rt);

		break;

	case KVM_INST_MFSPR_SPRG1:

	case KVM_INST_MFSPR(SPRN_SPRG1):

		kvm_patch_ins_ld(inst, magic_var(sprg1), inst_rt);

		break;

	case KVM_INST_MFSPR_SPRG2:

	case KVM_INST_MFSPR(SPRN_SPRG2):

		kvm_patch_ins_ld(inst, magic_var(sprg2), inst_rt);

		break;

	case KVM_INST_MFSPR_SPRG3:

	case KVM_INST_MFSPR(SPRN_SPRG3):

		kvm_patch_ins_ld(inst, magic_var(sprg3), inst_rt);

		break;

	case KVM_INST_MFSPR_SRR0:

	case KVM_INST_MFSPR(SPRN_SRR0):

		kvm_patch_ins_ld(inst, magic_var(srr0), inst_rt);

		break;

	case KVM_INST_MFSPR_SRR1:

	case KVM_INST_MFSPR(SPRN_SRR1):

		kvm_patch_ins_ld(inst, magic_var(srr1), inst_rt);

		break;

	case KVM_INST_MFSPR_DAR:

#ifdef CONFIG_BOOKE

	case KVM_INST_MFSPR(SPRN_DEAR):

#else

	case KVM_INST_MFSPR(SPRN_DAR):

#endif

		kvm_patch_ins_ld(inst, magic_var(dar), inst_rt);

		break;

	case KVM_INST_MFSPR_DSISR:

	case KVM_INST_MFSPR(SPRN_DSISR):

		kvm_patch_ins_lwz(inst, magic_var(dsisr), inst_rt);

		break;



#ifdef CONFIG_PPC_BOOK3E_MMU

	case KVM_INST_MFSPR(SPRN_MAS0):

		if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)

			kvm_patch_ins_lwz(inst, magic_var(mas0), inst_rt);

		break;

	case KVM_INST_MFSPR(SPRN_MAS1):

		if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)

			kvm_patch_ins_lwz(inst, magic_var(mas1), inst_rt);

		break;

	case KVM_INST_MFSPR(SPRN_MAS2):

		if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)

			kvm_patch_ins_ld(inst, magic_var(mas2), inst_rt);

		break;

	case KVM_INST_MFSPR(SPRN_MAS3):

		if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)

			kvm_patch_ins_lwz(inst, magic_var(mas7_3) + 4, inst_rt);

		break;

	case KVM_INST_MFSPR(SPRN_MAS4):

		if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)

			kvm_patch_ins_lwz(inst, magic_var(mas4), inst_rt);

		break;

	case KVM_INST_MFSPR(SPRN_MAS6):

		if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)

			kvm_patch_ins_lwz(inst, magic_var(mas6), inst_rt);

		break;

	case KVM_INST_MFSPR(SPRN_MAS7):

		if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)

			kvm_patch_ins_lwz(inst, magic_var(mas7_3), inst_rt);

		break;

#endif /* CONFIG_PPC_BOOK3E_MMU */



	case KVM_INST_MFSPR(SPRN_SPRG4):

#ifdef CONFIG_BOOKE

	case KVM_INST_MFSPR(SPRN_SPRG4R):

#endif

		if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)

			kvm_patch_ins_ld(inst, magic_var(sprg4), inst_rt);

		break;

	case KVM_INST_MFSPR(SPRN_SPRG5):

#ifdef CONFIG_BOOKE

	case KVM_INST_MFSPR(SPRN_SPRG5R):

#endif

		if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)

			kvm_patch_ins_ld(inst, magic_var(sprg5), inst_rt);

		break;

	case KVM_INST_MFSPR(SPRN_SPRG6):

#ifdef CONFIG_BOOKE

	case KVM_INST_MFSPR(SPRN_SPRG6R):

#endif

		if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)

			kvm_patch_ins_ld(inst, magic_var(sprg6), inst_rt);

		break;

	case KVM_INST_MFSPR(SPRN_SPRG7):

#ifdef CONFIG_BOOKE

	case KVM_INST_MFSPR(SPRN_SPRG7R):

#endif

		if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)

			kvm_patch_ins_ld(inst, magic_var(sprg7), inst_rt);

		break;



#ifdef CONFIG_BOOKE

	case KVM_INST_MFSPR(SPRN_ESR):

		if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)

			kvm_patch_ins_lwz(inst, magic_var(esr), inst_rt);

		break;

#endif



	case KVM_INST_MFSPR(SPRN_PIR):

		if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)

			kvm_patch_ins_lwz(inst, magic_var(pir), inst_rt);

		break;





	/* Stores */

	case KVM_INST_MTSPR_SPRG0:

	case KVM_INST_MTSPR(SPRN_SPRG0):

		kvm_patch_ins_std(inst, magic_var(sprg0), inst_rt);

		break;

	case KVM_INST_MTSPR_SPRG1:

	case KVM_INST_MTSPR(SPRN_SPRG1):

		kvm_patch_ins_std(inst, magic_var(sprg1), inst_rt);

		break;

	case KVM_INST_MTSPR_SPRG2:

	case KVM_INST_MTSPR(SPRN_SPRG2):

		kvm_patch_ins_std(inst, magic_var(sprg2), inst_rt);

		break;

	case KVM_INST_MTSPR_SPRG3:

	case KVM_INST_MTSPR(SPRN_SPRG3):

		kvm_patch_ins_std(inst, magic_var(sprg3), inst_rt);

		break;

	case KVM_INST_MTSPR_SRR0:

	case KVM_INST_MTSPR(SPRN_SRR0):

		kvm_patch_ins_std(inst, magic_var(srr0), inst_rt);

		break;

	case KVM_INST_MTSPR_SRR1:

	case KVM_INST_MTSPR(SPRN_SRR1):

		kvm_patch_ins_std(inst, magic_var(srr1), inst_rt);

		break;

	case KVM_INST_MTSPR_DAR:

#ifdef CONFIG_BOOKE

	case KVM_INST_MTSPR(SPRN_DEAR):

#else

	case KVM_INST_MTSPR(SPRN_DAR):

#endif

		kvm_patch_ins_std(inst, magic_var(dar), inst_rt);

		break;

	case KVM_INST_MTSPR_DSISR:

	case KVM_INST_MTSPR(SPRN_DSISR):

		kvm_patch_ins_stw(inst, magic_var(dsisr), inst_rt);

		break;

#ifdef CONFIG_PPC_BOOK3E_MMU

	case KVM_INST_MTSPR(SPRN_MAS0):

		if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)

			kvm_patch_ins_stw(inst, magic_var(mas0), inst_rt);

		break;

	case KVM_INST_MTSPR(SPRN_MAS1):

		if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)

			kvm_patch_ins_stw(inst, magic_var(mas1), inst_rt);

		break;

	case KVM_INST_MTSPR(SPRN_MAS2):

		if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)

			kvm_patch_ins_std(inst, magic_var(mas2), inst_rt);

		break;

	case KVM_INST_MTSPR(SPRN_MAS3):

		if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)

			kvm_patch_ins_stw(inst, magic_var(mas7_3) + 4, inst_rt);

		break;

	case KVM_INST_MTSPR(SPRN_MAS4):

		if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)

			kvm_patch_ins_stw(inst, magic_var(mas4), inst_rt);

		break;

	case KVM_INST_MTSPR(SPRN_MAS6):

		if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)

			kvm_patch_ins_stw(inst, magic_var(mas6), inst_rt);

		break;

	case KVM_INST_MTSPR(SPRN_MAS7):

		if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)

			kvm_patch_ins_stw(inst, magic_var(mas7_3), inst_rt);

		break;

#endif /* CONFIG_PPC_BOOK3E_MMU */



	case KVM_INST_MTSPR(SPRN_SPRG4):

		if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)

			kvm_patch_ins_std(inst, magic_var(sprg4), inst_rt);

		break;

	case KVM_INST_MTSPR(SPRN_SPRG5):

		if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)

			kvm_patch_ins_std(inst, magic_var(sprg5), inst_rt);

		break;

	case KVM_INST_MTSPR(SPRN_SPRG6):

		if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)

			kvm_patch_ins_std(inst, magic_var(sprg6), inst_rt);

		break;

	case KVM_INST_MTSPR(SPRN_SPRG7):

		if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)

			kvm_patch_ins_std(inst, magic_var(sprg7), inst_rt);

		break;



#ifdef CONFIG_BOOKE

	case KVM_INST_MTSPR(SPRN_ESR):

		if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)

			kvm_patch_ins_stw(inst, magic_var(esr), inst_rt);

		break;

#endif



	/* Nops */

	case KVM_INST_TLBSYNC:
@@ -556,9 +685,18 @@ static void kvm_use_magic_page(void) 
	start = (void*)_stext;

	end = (void*)_etext;



	/*

	 * Being interrupted in the middle of patching would

	 * be bad for SPRG4-7, which KVM can't keep in sync

	 * with emulated accesses because reads don't trap.

	 */

	local_irq_disable();



	for (p = start; p < end; p++)

		kvm_check_ins(p, features);



	local_irq_enable();



	printk(KERN_INFO "KVM: Live patching for a fast VM %s\n",

			 kvm_patching_worked ? "worked" : "failed");

}

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