Commit b565ff86 authored by Leon Elazar's avatar Leon Elazar Committed by Alex Deucher
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drm/amd/display: Add missing MI masks



This will fix the memory Input programing with MST tiled display.
This Fix should fix connectivity problems with MST tiled Display

Signed-off-by: default avatarLeon Elazar <leon.elazar@amd.com>
Acked-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 009432e5
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+2 −0
Original line number Diff line number Diff line
@@ -92,6 +92,8 @@ struct dce_mem_input_registers {
	.field_name = blk_name ## reg_name ## __ ## field_name ## post_fix

#define MI_GFX8_TILE_MASK_SH_LIST(mask_sh, blk)\
	SFB(blk, GRPH_CONTROL, GRPH_NUM_BANKS, mask_sh),\
	SFB(blk, GRPH_CONTROL, GRPH_BANK_WIDTH, mask_sh),\
	SFB(blk, GRPH_CONTROL, GRPH_BANK_HEIGHT, mask_sh),\
	SFB(blk, GRPH_CONTROL, GRPH_MACRO_TILE_ASPECT, mask_sh),\
	SFB(blk, GRPH_CONTROL, GRPH_TILE_SPLIT, mask_sh),\