Commit b3ec9469 authored Jan 14, 2020 by Dmitry Osipenko Committed by Wolfram Sang Jan 15, 2020

i2c: tegra: Check DMA completion status in addition to left time



It is more robust to check completion status in addition to the left time
in a case of DMA transfer because transfer's completion happens in two
phases [one is ISR, other is tasklet] and thus it is possible that DMA is
completed while I2C completion awaiting times out because of the deferred
notification done by the DMA driver. The DMA completion status becomes
100% actual after DMA synchronization. This fixes spurious DMA timeouts
when system is under load.

Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>

parent 28d98666

drivers/i2c/busses/i2c-tegra.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -1224,7 +1224,7 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,
		i2c_dev->rx_dma_chan :
		i2c_dev->tx_dma_chan);

		if (time_left == 0) {
		if (!time_left && !completion_done(&i2c_dev->dma_complete)) {
		dev_err(i2c_dev->dev, "DMA transfer timeout\n");
		tegra_i2c_init(i2c_dev, true);
		return -ETIMEDOUT;

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