Commit b3ca0f39 authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
Browse files

drm/amd/pp: Fix fan's RPM setting not work on VI/Vega10 



set the target rpm value to wrong register.

Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 8f97829e

drivers/gpu/drm/amd/powerplay/hwmgr/smu7_thermal.c

+1 −1
Original line number Diff line number Diff line
@@ -272,7 +272,7 @@ int smu7_fan_ctrl_set_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t speed) 
	tach_period = 60 * crystal_clock_freq * 10000 / (8 * speed);



	PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,

				CG_TACH_STATUS, TACH_PERIOD, tach_period);

				CG_TACH_CTRL, TARGET_PERIOD, tach_period);



	return smu7_fan_ctrl_set_static_mode(hwmgr, FDO_PWM_MODE_STATIC_RPM);

}

drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c

+3 −3
Original line number Diff line number Diff line
@@ -322,9 +322,9 @@ int vega10_fan_ctrl_set_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t speed) 
	if (!result) {

		crystal_clock_freq = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev);

		tach_period = 60 * crystal_clock_freq * 10000 / (8 * speed);

		WREG32_SOC15(THM, 0, mmCG_TACH_STATUS,

				REG_SET_FIELD(RREG32_SOC15(THM, 0, mmCG_TACH_STATUS),

					CG_TACH_STATUS, TACH_PERIOD,

		WREG32_SOC15(THM, 0, mmCG_TACH_CTRL,

				REG_SET_FIELD(RREG32_SOC15(THM, 0, mmCG_TACH_CTRL),

					CG_TACH_CTRL, TARGET_PERIOD,

					tach_period));

	}

	return vega10_fan_ctrl_set_static_mode(hwmgr, FDO_PWM_MODE_STATIC_RPM);

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