Commit b3b3519c authored Oct 24, 2019 by Hans de Goede Committed by Rafael J. Wysocki Oct 25, 2019

ACPI: LPSS: Add LNXVIDEO -> BYT I2C1 to lpss_device_links

Various Asus Bay Trail devices (T100TA, T100CHI, T200TA) have an embedded
controller connected to I2C1 and the iGPU (LNXVIDEO) _PS0/_PS3 methods
access it, so we need to add a consumer link from LNXVIDEO to I2C1 on
these devices to avoid suspend/resume ordering problems.

Fixes: 2d71ee0c ("ACPI / LPSS: Add a device link from the GPU to the BYT I2C5 controller")
Tested-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: 4.20+ <stable@vger.kernel.org> # 4.20+
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

parent cc18735f

drivers/acpi/acpi_lpss.c

+2 −0

Original line number	Diff line number	Diff line
		@@ -477,6 +477,8 @@ static const struct lpss_device_links lpss_device_links[] = {
		{"808622C1", "7", "80860F14", "3", DL_FLAG_PM_RUNTIME},
		/* CHT iGPU depends on PMIC I2C controller */
		{"808622C1", "7", "LNXVIDEO", NULL, DL_FLAG_PM_RUNTIME},
		/* BYT iGPU depends on the Embedded Controller I2C controller (UID 1) */
		{"80860F41", "1", "LNXVIDEO", NULL, DL_FLAG_PM_RUNTIME},
		/* BYT CR iGPU depends on PMIC I2C controller (UID 5 on CR) */
		{"80860F41", "5", "LNXVIDEO", NULL, DL_FLAG_PM_RUNTIME},
		/* BYT iGPU depends on PMIC I2C controller (UID 7 on non CR) */