Unverified Commit b3a428b4 authored by Hassan Naveed's avatar Hassan Naveed Committed by Paul Burton
Browse files

MIPS: Enable IOREMAP_PROT config option for MIPS cpus 



Allows the users of ptrace to access memory mapped by the ptraced process
using the same cache coherency attributes as the original process.
For example while using gdb with ioremap_prot() incorporated, both gdb and
the process being traced will have same cache coherency attributes.

Signed-off-by: default avatarHassan Naveed <hnaveed@wavecomp.com>
Signed-off-by: default avatarPaul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/20955/
Cc: <linux-mips@linux-mips.org>
parent 67769857

Documentation/features/vm/ioremap_prot/arch-support.txt

+1 −1
Original line number Diff line number Diff line
@@ -16,7 +16,7 @@ 
    |        ia64: | TODO |

    |        m68k: | TODO |

    |  microblaze: | TODO |

    |        mips: | TODO |

    |        mips: |  ok  |

    |       nds32: | TODO |

    |       nios2: | TODO |

    |    openrisc: | TODO |

arch/mips/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -56,6 +56,7 @@ config MIPS 
	select HAVE_FUNCTION_TRACER

	select HAVE_GENERIC_DMA_COHERENT

	select HAVE_IDE

	select HAVE_IOREMAP_PROT

	select HAVE_IRQ_EXIT_ON_IRQ_STACK

	select HAVE_IRQ_TIME_ACCOUNTING

	select HAVE_KPROBES

arch/mips/include/asm/io.h

+12 −0
Original line number Diff line number Diff line
@@ -217,6 +217,18 @@ static inline void __iomem * __ioremap_mode(phys_addr_t offset, unsigned long si 
#undef __IS_LOW512

}



/*

 * ioremap_prot     -   map bus memory into CPU space

 * @offset:    bus address of the memory

 * @size:      size of the resource to map



 * ioremap_prot gives the caller control over cache coherency attributes (CCA)

 */

static inline void __iomem *ioremap_prot(phys_addr_t offset,

		unsigned long size, unsigned long prot_val) {

	return __ioremap_mode(offset, size, prot_val & _CACHE_MASK);

}



/*

 * ioremap     -   map bus memory into CPU space

 * @offset:    bus address of the memory

arch/mips/include/asm/page.h

+1 −0
Original line number Diff line number Diff line
@@ -154,6 +154,7 @@ typedef struct { unsigned long pgd; } pgd_t; 
typedef struct { unsigned long pgprot; } pgprot_t;

#define pgprot_val(x)	((x).pgprot)

#define __pgprot(x)	((pgprot_t) { (x) } )

#define pte_pgprot(x)	__pgprot(pte_val(x) & ~_PFN_MASK)



/*

 * On R4000-style MMUs where a TLB entry is mapping a adjacent even / odd

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