r8169: quirk for the 8110sb on arm platform (b39fe41f) · Commits · 戴 / test

Inverting the write ordering of the TxDescAddr{High/Low} registers suffices to trigger a sabbat of PCI errors which make the device completely dysfunctional. The issue has not been reported on a different platform. Switching from MMIO accesses to I/O ones as done in Realtek's own driver fixes (papers over ?) the bug as well but I am not thrilled to see everyone pay the I/O price for an obscure bug. This is the minimal change to handle the issue. Signed-off-by:

Francois Romieu <romieu@fr.zoreil.com> Reported-by:

Lennert Buytenhek <buytenh@wantstofly.org>

drivers/net/r8169.c

+7 −2

Original line number	Diff line number	Diff line
		@@ -1904,10 +1904,15 @@ rtl8169_hw_start(struct net_device *dev)
		*/
		RTL_W16(IntrMitigate, 0x0000);

		RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr & DMA_32BIT_MASK));
		/*
		* Magic spell: some iop3xx ARM board needs the TxDescAddrHigh
		* register to be written before TxDescAddrLow to work.
		* Switching from MMIO to I/O access fixes the issue as well.
		*/
		RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr >> 32));
		RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_32BIT_MASK));
		RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr & DMA_32BIT_MASK));
		RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr >> 32));
		RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_32BIT_MASK));
		RTL_W8(ChipCmd, CmdTxEnb \| CmdRxEnb);
		RTL_W8(Cfg9346, Cfg9346_Lock);

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