Commit b32fb024 authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branch 'remotes/lorenzo/pci/altera' 

  - Allow building Altera host bridge driver as a module (Ley Foon Tan)

  - Fix Altera Stratix 10 Type 1 to Type 0 config access conversion (Ley
    Foon Tan)

* remotes/lorenzo/pci/altera:
  PCI: altera: Fix configuration type based on secondary number
  PCI: altera-msi: Allow building as module
  PCI: altera: Allow building as module
parents 55ab3ecb 7a28db0a

drivers/pci/controller/Kconfig

+2 −2
Original line number Diff line number Diff line
@@ -174,14 +174,14 @@ config PCIE_IPROC_MSI 
	  PCIe controller



config PCIE_ALTERA

	bool "Altera PCIe controller"

	tristate "Altera PCIe controller"

	depends on ARM || NIOS2 || ARM64 || COMPILE_TEST

	help

	  Say Y here if you want to enable PCIe controller support on Altera

	  FPGA.



config PCIE_ALTERA_MSI

	bool "Altera PCIe MSI feature"

	tristate "Altera PCIe MSI feature"

	depends on PCIE_ALTERA

	depends on PCI_MSI_IRQ_DOMAIN

	help

drivers/pci/controller/pcie-altera-msi.c

+10 −0
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ 
#include <linux/interrupt.h>

#include <linux/irqchip/chained_irq.h>

#include <linux/init.h>

#include <linux/module.h>

#include <linux/msi.h>

#include <linux/of_address.h>

#include <linux/of_irq.h>
@@ -288,4 +289,13 @@ static int __init altera_msi_init(void) 
{

	return platform_driver_register(&altera_msi_driver);

}



static void __exit altera_msi_exit(void)

{

	platform_driver_unregister(&altera_msi_driver);

}



subsys_initcall(altera_msi_init);

MODULE_DEVICE_TABLE(of, altera_msi_of_match);

module_exit(altera_msi_exit);

MODULE_LICENSE("GPL v2");

drivers/pci/controller/pcie-altera.c

+53 −16
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ 
#include <linux/interrupt.h>

#include <linux/irqchip/chained_irq.h>

#include <linux/init.h>

#include <linux/module.h>

#include <linux/of_address.h>

#include <linux/of_device.h>

#include <linux/of_irq.h>
@@ -43,6 +44,8 @@ 
#define S10_RP_RXCPL_STATUS		0x200C

#define S10_RP_CFG_ADDR(pcie, reg)	\

	(((pcie)->hip_base) + (reg) + (1 << 20))

#define S10_RP_SECONDARY(pcie)		\

	readb(S10_RP_CFG_ADDR(pcie, PCI_SECONDARY_BUS))



/* TLP configuration type 0 and 1 */

#define TLP_FMTTYPE_CFGRD0		0x04	/* Configuration Read Type 0 */
@@ -54,13 +57,8 @@ 
#define TLP_WRITE_TAG			0x10

#define RP_DEVFN			0

#define TLP_REQ_ID(bus, devfn)		(((bus) << 8) | (devfn))

#define TLP_CFGRD_DW0(pcie, bus)					\

	((((bus == pcie->root_bus_nr) ? pcie->pcie_data->cfgrd0		\

				: pcie->pcie_data->cfgrd1) << 24) |	\

				TLP_PAYLOAD_SIZE)

#define TLP_CFGWR_DW0(pcie, bus)					\

	((((bus == pcie->root_bus_nr) ? pcie->pcie_data->cfgwr0		\

				: pcie->pcie_data->cfgwr1) << 24) |	\

#define TLP_CFG_DW0(pcie, cfg)		\

		(((cfg) << 24) |	\

		  TLP_PAYLOAD_SIZE)

#define TLP_CFG_DW1(pcie, tag, be)	\

	(((TLP_REQ_ID(pcie->root_bus_nr,  RP_DEVFN)) << 16) | (tag << 8) | (be))
@@ -321,14 +319,31 @@ static void s10_tlp_write_packet(struct altera_pcie *pcie, u32 *headers, 
	s10_tlp_write_tx(pcie, data, RP_TX_EOP);

}



static void get_tlp_header(struct altera_pcie *pcie, u8 bus, u32 devfn,

			   int where, u8 byte_en, bool read, u32 *headers)

{

	u8 cfg;

	u8 cfg0 = read ? pcie->pcie_data->cfgrd0 : pcie->pcie_data->cfgwr0;

	u8 cfg1 = read ? pcie->pcie_data->cfgrd1 : pcie->pcie_data->cfgwr1;

	u8 tag = read ? TLP_READ_TAG : TLP_WRITE_TAG;



	if (pcie->pcie_data->version == ALTERA_PCIE_V1)

		cfg = (bus == pcie->root_bus_nr) ? cfg0 : cfg1;

	else

		cfg = (bus > S10_RP_SECONDARY(pcie)) ? cfg0 : cfg1;



	headers[0] = TLP_CFG_DW0(pcie, cfg);

	headers[1] = TLP_CFG_DW1(pcie, tag, byte_en);

	headers[2] = TLP_CFG_DW2(bus, devfn, where);

}



static int tlp_cfg_dword_read(struct altera_pcie *pcie, u8 bus, u32 devfn,

			      int where, u8 byte_en, u32 *value)

{

	u32 headers[TLP_HDR_SIZE];



	headers[0] = TLP_CFGRD_DW0(pcie, bus);

	headers[1] = TLP_CFG_DW1(pcie, TLP_READ_TAG, byte_en);

	headers[2] = TLP_CFG_DW2(bus, devfn, where);

	get_tlp_header(pcie, bus, devfn, where, byte_en, true,

		       headers);



	pcie->pcie_data->ops->tlp_write_pkt(pcie, headers, 0, false);
@@ -341,9 +356,8 @@ static int tlp_cfg_dword_write(struct altera_pcie *pcie, u8 bus, u32 devfn, 
	u32 headers[TLP_HDR_SIZE];

	int ret;



	headers[0] = TLP_CFGWR_DW0(pcie, bus);

	headers[1] = TLP_CFG_DW1(pcie, TLP_WRITE_TAG, byte_en);

	headers[2] = TLP_CFG_DW2(bus, devfn, where);

	get_tlp_header(pcie, bus, devfn, where, byte_en, false,

		       headers);



	/* check alignment to Qword */

	if ((where & 0x7) == 0)
@@ -705,6 +719,13 @@ static int altera_pcie_init_irq_domain(struct altera_pcie *pcie) 
	return 0;

}



static void altera_pcie_irq_teardown(struct altera_pcie *pcie)

{

	irq_set_chained_handler_and_data(pcie->irq, NULL, NULL);

	irq_domain_remove(pcie->irq_domain);

	irq_dispose_mapping(pcie->irq);

}



static int altera_pcie_parse_dt(struct altera_pcie *pcie)

{

	struct device *dev = &pcie->pdev->dev;
@@ -798,6 +819,7 @@ static int altera_pcie_probe(struct platform_device *pdev) 


	pcie = pci_host_bridge_priv(bridge);

	pcie->pdev = pdev;

	platform_set_drvdata(pdev, pcie);



	match = of_match_device(altera_pcie_of_match, &pdev->dev);

	if (!match)
@@ -855,13 +877,28 @@ static int altera_pcie_probe(struct platform_device *pdev) 
	return ret;

}



static int altera_pcie_remove(struct platform_device *pdev)

{

	struct altera_pcie *pcie = platform_get_drvdata(pdev);

	struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie);



	pci_stop_root_bus(bridge->bus);

	pci_remove_root_bus(bridge->bus);

	pci_free_resource_list(&pcie->resources);

	altera_pcie_irq_teardown(pcie);



	return 0;

}



static struct platform_driver altera_pcie_driver = {

	.probe		= altera_pcie_probe,

	.remove		= altera_pcie_remove,

	.driver = {

		.name	= "altera-pcie",

		.of_match_table = altera_pcie_of_match,

		.suppress_bind_attrs = true,

	},

};



builtin_platform_driver(altera_pcie_driver);
 
MODULE_DEVICE_TABLE(of, altera_pcie_of_match);

module_platform_driver(altera_pcie_driver);

MODULE_LICENSE("GPL v2");

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