Merge branches 'thermal-core', 'thermal-soc', 'thermal-intel' and...

- compatible:

  - "mediatek,mt8173-thermal" : For MT8173 family of SoCs

  - "mediatek,mt2701-thermal" : For MT2701 family of SoCs

  - "mediatek,mt2712-thermal" : For MT2712 family of SoCs

- reg: Address range of the thermal controller

- interrupts: IRQ for the thermal controller

- clocks, clock-names: Clocks needed for the thermal controller. required

- compatible : should be "rockchip,<name>-tsadc"

   "rockchip,rk3228-tsadc": found on RK3228 SoCs

   "rockchip,rk3288-tsadc": found on RK3288 SoCs

   "rockchip,rk3328-tsadc": found on RK3328 SoCs

   "rockchip,rk3368-tsadc": found on RK3368 SoCs

   "rockchip,rk3399-tsadc": found on RK3399 SoCs

- reg : physical base address of the controller and length of memory mapped

* UniPhier Thermal bindings

This describes the devicetree bindings for thermal monitor supported by

PVT(Process, Voltage and Temperature) monitoring unit implemented on Socionext

UniPhier SoCs.

Required properties:

- compatible :

  - "socionext,uniphier-pxs2-thermal" : For UniPhier PXs2 SoC

  - "socionext,uniphier-ld20-thermal" : For UniPhier LD20 SoC

- interrupts : IRQ for the temperature alarm

- #thermal-sensor-cells : Should be 0. See ./thermal.txt for details.

Optional properties:

- socionext,tmod-calibration: A pair of calibrated values referred from PVT,

                              in case that the values aren't set on SoC,

                              like a reference board.

Example:

	sysctrl@61840000 {

		compatible = "socionext,uniphier-ld20-sysctrl",

			     "simple-mfd", "syscon";

		reg = <0x61840000 0x10000>;

		...

		pvtctl: pvtctl {

			compatible = "socionext,uniphier-ld20-thermal";

			interrupts = <0 3 1>;

			#thermal-sensor-cells = <0>;

		};

		...

	};

	thermal-zones {

		cpu_thermal {

			polling-delay-passive = <250>;	/* 250ms */

			polling-delay = <1000>;		/* 1000ms */

			thermal-sensors = <&pvtctl>;

			trips {

				cpu_crit: cpu_crit {

					temperature = <110000>;	/* 110C */

					hysteresis = <2000>;

					type = "critical";

				};

				cpu_alert: cpu_alert {

					temperature = <100000>;	/* 100C */

					hysteresis = <2000>;

					type = "passive";

				};

			};

			cooling-maps {

				map0 {

					trip = <&cpu_alert>;

					cooling-device = <&cpu0 (-1) (-1)>;

				};

				map1 {

					trip = <&cpu_alert>;

					cooling-device = <&cpu2 (-1) (-1)>;

				};

			};

		};

	};

config INTEL_SOC_DTS_IOSF_CORE

	tristate

	depends on X86

	depends on X86 && PCI

	select IOSF_MBI

	help

	  This is becoming a common feature for Intel SoCs to expose the additional

config INTEL_SOC_DTS_THERMAL

	tristate "Intel SoCs DTS thermal driver"

	depends on X86

	depends on X86 && PCI

	select INTEL_SOC_DTS_IOSF_CORE

	select THERMAL_WRITABLE_TRIPS

	help

	  the primitive temperature sensor embedded in zx2967 SoCs.

	  This sensor generates the real time die temperature.

config UNIPHIER_THERMAL

	tristate "Socionext UniPhier thermal driver"

	depends on ARCH_UNIPHIER || COMPILE_TEST

	depends on THERMAL_OF && MFD_SYSCON

	help

	  Enable this to plug in UniPhier on-chip PVT thermal driver into the

	  thermal framework. The driver supports CPU thermal zone temperature

	  reporting and a couple of trip points.

endif

obj-$(CONFIG_MTK_THERMAL)	+= mtk_thermal.o

obj-$(CONFIG_GENERIC_ADC_THERMAL)	+= thermal-generic-adc.o

obj-$(CONFIG_ZX2967_THERMAL)	+= zx2967_thermal.o

obj-$(CONFIG_UNIPHIER_THERMAL)	+= uniphier_thermal.o