Commit b316e186 authored by Leon Romanovsky's avatar Leon Romanovsky
Browse files

net/mlx5: Update FPGA to new cmd interface 



Do mass update of FPGA to reuse newly introduced
mlx5_cmd_exec_in*() interfaces.

Reviewed-by: default avatarMoshe Shemesh <moshe@mellanox.com>
Signed-off-by: default avatarLeon Romanovsky <leonro@mellanox.com>
parent e08a6832

drivers/net/ethernet/mellanox/mlx5/core/fpga/cmd.c

+13 −15
Original line number Diff line number Diff line
@@ -142,15 +142,15 @@ int mlx5_fpga_query(struct mlx5_core_dev *dev, struct mlx5_fpga_query *query) 
int mlx5_fpga_create_qp(struct mlx5_core_dev *dev, void *fpga_qpc,

			u32 *fpga_qpn)

{

	u32 in[MLX5_ST_SZ_DW(fpga_create_qp_in)] = {0};

	u32 out[MLX5_ST_SZ_DW(fpga_create_qp_out)];

	u32 out[MLX5_ST_SZ_DW(fpga_create_qp_out)] = {};

	u32 in[MLX5_ST_SZ_DW(fpga_create_qp_in)] = {};

	int ret;



	MLX5_SET(fpga_create_qp_in, in, opcode, MLX5_CMD_OP_FPGA_CREATE_QP);

	memcpy(MLX5_ADDR_OF(fpga_create_qp_in, in, fpga_qpc), fpga_qpc,

	       MLX5_FLD_SZ_BYTES(fpga_create_qp_in, fpga_qpc));



	ret = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));

	ret = mlx5_cmd_exec_inout(dev, fpga_create_qp, in, out);

	if (ret)

		return ret;
@@ -164,8 +164,7 @@ int mlx5_fpga_modify_qp(struct mlx5_core_dev *dev, u32 fpga_qpn, 
			enum mlx5_fpga_qpc_field_select fields,

			void *fpga_qpc)

{

	u32 in[MLX5_ST_SZ_DW(fpga_modify_qp_in)] = {0};

	u32 out[MLX5_ST_SZ_DW(fpga_modify_qp_out)];

	u32 in[MLX5_ST_SZ_DW(fpga_modify_qp_in)] = {};



	MLX5_SET(fpga_modify_qp_in, in, opcode, MLX5_CMD_OP_FPGA_MODIFY_QP);

	MLX5_SET(fpga_modify_qp_in, in, field_select, fields);
@@ -173,20 +172,20 @@ int mlx5_fpga_modify_qp(struct mlx5_core_dev *dev, u32 fpga_qpn, 
	memcpy(MLX5_ADDR_OF(fpga_modify_qp_in, in, fpga_qpc), fpga_qpc,

	       MLX5_FLD_SZ_BYTES(fpga_modify_qp_in, fpga_qpc));



	return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));

	return mlx5_cmd_exec_in(dev, fpga_modify_qp, in);

}



int mlx5_fpga_query_qp(struct mlx5_core_dev *dev,

		       u32 fpga_qpn, void *fpga_qpc)

{

	u32 in[MLX5_ST_SZ_DW(fpga_query_qp_in)] = {0};

	u32 out[MLX5_ST_SZ_DW(fpga_query_qp_out)];

	u32 out[MLX5_ST_SZ_DW(fpga_query_qp_out)] = {};

	u32 in[MLX5_ST_SZ_DW(fpga_query_qp_in)] = {};

	int ret;



	MLX5_SET(fpga_query_qp_in, in, opcode, MLX5_CMD_OP_FPGA_QUERY_QP);

	MLX5_SET(fpga_query_qp_in, in, fpga_qpn, fpga_qpn);



	ret = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));

	ret = mlx5_cmd_exec_inout(dev, fpga_query_qp, in, out);

	if (ret)

		return ret;
@@ -197,20 +196,19 @@ int mlx5_fpga_query_qp(struct mlx5_core_dev *dev, 


int mlx5_fpga_destroy_qp(struct mlx5_core_dev *dev, u32 fpga_qpn)

{

	u32 in[MLX5_ST_SZ_DW(fpga_destroy_qp_in)] = {0};

	u32 out[MLX5_ST_SZ_DW(fpga_destroy_qp_out)];

	u32 in[MLX5_ST_SZ_DW(fpga_destroy_qp_in)] = {};



	MLX5_SET(fpga_destroy_qp_in, in, opcode, MLX5_CMD_OP_FPGA_DESTROY_QP);

	MLX5_SET(fpga_destroy_qp_in, in, fpga_qpn, fpga_qpn);



	return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));

	return mlx5_cmd_exec_in(dev, fpga_destroy_qp, in);

}



int mlx5_fpga_query_qp_counters(struct mlx5_core_dev *dev, u32 fpga_qpn,

				bool clear, struct mlx5_fpga_qp_counters *data)

{

	u32 in[MLX5_ST_SZ_DW(fpga_query_qp_counters_in)] = {0};

	u32 out[MLX5_ST_SZ_DW(fpga_query_qp_counters_out)];

	u32 out[MLX5_ST_SZ_DW(fpga_query_qp_counters_out)] = {};

	u32 in[MLX5_ST_SZ_DW(fpga_query_qp_counters_in)] = {};

	int ret;



	MLX5_SET(fpga_query_qp_counters_in, in, opcode,
@@ -218,7 +216,7 @@ int mlx5_fpga_query_qp_counters(struct mlx5_core_dev *dev, u32 fpga_qpn, 
	MLX5_SET(fpga_query_qp_counters_in, in, clear, clear);

	MLX5_SET(fpga_query_qp_counters_in, in, fpga_qpn, fpga_qpn);



	ret = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));

	ret = mlx5_cmd_exec_inout(dev, fpga_query_qp_counters, in, out);

	if (ret)

		return ret;

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