Commit b2c91128 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'parisc-5.2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux 

Pull more parisc updates from Helge Deller:
 "Two small enhancements, which I didn't included in the last pull
  request because I wanted to keep them a few more days in for-next
  before sending upstream:

   - Replace the ldcw barrier instruction by a nop instruction in the
     CAS code on uniprocessor machines.

   - Map variables read-only after init (enable ro_after_init feature)"

* 'parisc-5.2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux:
  parisc: Use __ro_after_init in init.c
  parisc: Use __ro_after_init in unwind.c
  parisc: Use __ro_after_init in time.c
  parisc: Use __ro_after_init in processor.c
  parisc: Use __ro_after_init in process.c
  parisc: Use __ro_after_init in perf_images.h
  parisc: Use __ro_after_init in pci.c
  parisc: Use __ro_after_init in inventory.c
  parisc: Use __ro_after_init in head.S
  parisc: Use __ro_after_init in firmware.c
  parisc: Use __ro_after_init in drivers.c
  parisc: Use __ro_after_init in cache.c
  parisc: Enable the ro_after_init feature
  parisc: Drop LDCW barrier in CAS code when running UP
parents ca4b4062 4e617c86

arch/parisc/include/asm/cache.h

+0 −3
Original line number Diff line number Diff line
@@ -24,9 +24,6 @@ 


#define __read_mostly __attribute__((__section__(".data..read_mostly")))



/* Read-only memory is marked before mark_rodata_ro() is called. */

#define __ro_after_init	__read_mostly



void parisc_cache_init(void);	/* initializes cache-flushing */

void disable_sr_hashing_asm(int); /* low level support for above */

void disable_sr_hashing(void);   /* turns off space register hashing */

arch/parisc/kernel/cache.c

+8 −8
Original line number Diff line number Diff line
@@ -29,9 +29,9 @@ 
#include <asm/sections.h>

#include <asm/shmparam.h>



int split_tlb __read_mostly;

int dcache_stride __read_mostly;

int icache_stride __read_mostly;

int split_tlb __ro_after_init;

int dcache_stride __ro_after_init;

int icache_stride __ro_after_init;

EXPORT_SYMBOL(dcache_stride);



void flush_dcache_page_asm(unsigned long phys_addr, unsigned long vaddr);
@@ -51,12 +51,12 @@ DEFINE_SPINLOCK(pa_tlb_flush_lock); 
DEFINE_SPINLOCK(pa_swapper_pg_lock);



#if defined(CONFIG_64BIT) && defined(CONFIG_SMP)

int pa_serialize_tlb_flushes __read_mostly;

int pa_serialize_tlb_flushes __ro_after_init;

#endif



struct pdc_cache_info cache_info __read_mostly;

struct pdc_cache_info cache_info __ro_after_init;

#ifndef CONFIG_PA20

static struct pdc_btlb_info btlb_info __read_mostly;

static struct pdc_btlb_info btlb_info __ro_after_init;

#endif



#ifdef CONFIG_SMP
@@ -381,10 +381,10 @@ EXPORT_SYMBOL(flush_data_cache_local); 
EXPORT_SYMBOL(flush_kernel_icache_range_asm);



#define FLUSH_THRESHOLD 0x80000 /* 0.5MB */

static unsigned long parisc_cache_flush_threshold __read_mostly = FLUSH_THRESHOLD;

static unsigned long parisc_cache_flush_threshold __ro_after_init = FLUSH_THRESHOLD;



#define FLUSH_TLB_THRESHOLD (16*1024) /* 16 KiB minimum TLB threshold */

static unsigned long parisc_tlb_flush_threshold __read_mostly = FLUSH_TLB_THRESHOLD;

static unsigned long parisc_tlb_flush_threshold __ro_after_init = FLUSH_TLB_THRESHOLD;



void __init parisc_setup_cache_timing(void)

{

arch/parisc/kernel/drivers.c

+1 −1
Original line number Diff line number Diff line
@@ -41,7 +41,7 @@ 
#include <asm/ropes.h>



/* See comments in include/asm-parisc/pci.h */

const struct dma_map_ops *hppa_dma_ops __read_mostly;

const struct dma_map_ops *hppa_dma_ops __ro_after_init;

EXPORT_SYMBOL(hppa_dma_ops);



static struct device root = {

arch/parisc/kernel/firmware.c

+1 −1
Original line number Diff line number Diff line
@@ -87,7 +87,7 @@ extern unsigned long pdc_result2[NUM_PDC_RESULT]; 


/* Firmware needs to be initially set to narrow to determine the 

 * actual firmware width. */

int parisc_narrow_firmware __read_mostly = 1;

int parisc_narrow_firmware __ro_after_init = 1;

#endif



/* On most currently-supported platforms, IODC I/O calls are 32-bit calls

arch/parisc/kernel/head.S

+1 −1
Original line number Diff line number Diff line
@@ -376,7 +376,7 @@ smp_slave_stext: 
ENDPROC(parisc_kernel_start)



#ifndef CONFIG_64BIT

	.section .data..read_mostly

	.section .data..ro_after_init



	.align	4

	.export	$global$,data

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