Commit b2ae318a authored by Rodrigo Vivi's avatar Rodrigo Vivi
Browse files

drm/i915: Rename HAS_GMCH 



First of all GMCH can be considered a feature by itself
since it is a chip present in some platforms that connects
the IA processor to memory and other components in PC.

Also with the introduction of display block at device info,
we got a redundant definition:

.display.has_gmch_display = 1,

So, let's clean up things a bit and use the standardized
way of has_feature on displays side.

No functional change and no manual interaction to generate
this patch.

It is only:

sed -si -e 's/has_gmch_display/has_gmch/g' \
    	-e 's/HAS_GMCH_DISPLAY/HAS_GMCH/g' drivers/gpu/drm/i915/*{c,h}

Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190204222538.15842-1-rodrigo.vivi@intel.com
parent 21950ee7

drivers/gpu/drm/i915/i915_debugfs.c

+2 −2
Original line number Diff line number Diff line
@@ -3727,7 +3727,7 @@ static int spr_wm_latency_open(struct inode *inode, struct file *file) 
{

	struct drm_i915_private *dev_priv = inode->i_private;



	if (HAS_GMCH_DISPLAY(dev_priv))

	if (HAS_GMCH(dev_priv))

		return -ENODEV;



	return single_open(file, spr_wm_latency_show, dev_priv);
@@ -3737,7 +3737,7 @@ static int cur_wm_latency_open(struct inode *inode, struct file *file) 
{

	struct drm_i915_private *dev_priv = inode->i_private;



	if (HAS_GMCH_DISPLAY(dev_priv))

	if (HAS_GMCH(dev_priv))

		return -ENODEV;



	return single_open(file, cur_wm_latency_show, dev_priv);

drivers/gpu/drm/i915/i915_drv.h

+2 −2
Original line number Diff line number Diff line
@@ -2490,7 +2490,7 @@ static inline unsigned int i915_sg_segment_size(void) 


#define HAS_FW_BLC(dev_priv) 	(INTEL_GEN(dev_priv) > 2)

#define HAS_FBC(dev_priv)	(INTEL_INFO(dev_priv)->display.has_fbc)

#define HAS_CUR_FBC(dev_priv)	(!HAS_GMCH_DISPLAY(dev_priv) && INTEL_GEN(dev_priv) >= 7)

#define HAS_CUR_FBC(dev_priv)	(!HAS_GMCH(dev_priv) && INTEL_GEN(dev_priv) >= 7)



#define HAS_IPS(dev_priv)	(IS_HSW_ULT(dev_priv) || IS_BROADWELL(dev_priv))
@@ -2570,7 +2570,7 @@ static inline unsigned int i915_sg_segment_size(void) 
#define HAS_PCH_NOP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_NOP)

#define HAS_PCH_SPLIT(dev_priv) (INTEL_PCH_TYPE(dev_priv) != PCH_NONE)



#define HAS_GMCH_DISPLAY(dev_priv) (INTEL_INFO(dev_priv)->display.has_gmch_display)

#define HAS_GMCH(dev_priv) (INTEL_INFO(dev_priv)->display.has_gmch)



#define HAS_LSPCON(dev_priv) (INTEL_GEN(dev_priv) >= 9)

drivers/gpu/drm/i915/i915_pci.c

+5 −5
Original line number Diff line number Diff line
@@ -88,7 +88,7 @@ 
	.num_pipes = 1, \

	.display.has_overlay = 1, \

	.display.overlay_needs_physical = 1, \

	.display.has_gmch_display = 1, \

	.display.has_gmch = 1, \

	.gpu_reset_clobbers_display = true, \

	.hws_needs_physical = 1, \

	.unfenced_needs_alignment = 1, \
@@ -129,7 +129,7 @@ static const struct intel_device_info intel_i865g_info = { 
#define GEN3_FEATURES \

	GEN(3), \

	.num_pipes = 2, \

	.display.has_gmch_display = 1, \

	.display.has_gmch = 1, \

	.gpu_reset_clobbers_display = true, \

	.ring_mask = RENDER_RING, \

	.has_snoop = true, \
@@ -206,7 +206,7 @@ static const struct intel_device_info intel_pineview_info = { 
	GEN(4), \

	.num_pipes = 2, \

	.display.has_hotplug = 1, \

	.display.has_gmch_display = 1, \

	.display.has_gmch = 1, \

	.gpu_reset_clobbers_display = true, \

	.ring_mask = RENDER_RING, \

	.has_snoop = true, \
@@ -382,7 +382,7 @@ static const struct intel_device_info intel_valleyview_info = { 
	.num_pipes = 2,

	.has_runtime_pm = 1,

	.has_rc6 = 1,

	.display.has_gmch_display = 1,

	.display.has_gmch = 1,

	.display.has_hotplug = 1,

	.ppgtt = INTEL_PPGTT_FULL,

	.has_snoop = true,
@@ -474,7 +474,7 @@ static const struct intel_device_info intel_cherryview_info = { 
	.has_runtime_pm = 1,

	.has_rc6 = 1,

	.has_logical_ring_contexts = 1,

	.display.has_gmch_display = 1,

	.display.has_gmch = 1,

	.ppgtt = INTEL_PPGTT_FULL,

	.has_reset_engine = 1,

	.has_snoop = true,

drivers/gpu/drm/i915/i915_suspend.c

+2 −2
Original line number Diff line number Diff line
@@ -86,7 +86,7 @@ int i915_save_state(struct drm_i915_private *dev_priv) 
	} else if (IS_GEN(dev_priv, 2)) {

		for (i = 0; i < 7; i++)

			dev_priv->regfile.saveSWF1[i] = I915_READ(SWF1(i));

	} else if (HAS_GMCH_DISPLAY(dev_priv)) {

	} else if (HAS_GMCH(dev_priv)) {

		for (i = 0; i < 16; i++) {

			dev_priv->regfile.saveSWF0[i] = I915_READ(SWF0(i));

			dev_priv->regfile.saveSWF1[i] = I915_READ(SWF1(i));
@@ -131,7 +131,7 @@ int i915_restore_state(struct drm_i915_private *dev_priv) 
	} else if (IS_GEN(dev_priv, 2)) {

		for (i = 0; i < 7; i++)

			I915_WRITE(SWF1(i), dev_priv->regfile.saveSWF1[i]);

	} else if (HAS_GMCH_DISPLAY(dev_priv)) {

	} else if (HAS_GMCH(dev_priv)) {

		for (i = 0; i < 16; i++) {

			I915_WRITE(SWF0(i), dev_priv->regfile.saveSWF0[i]);

			I915_WRITE(SWF1(i), dev_priv->regfile.saveSWF1[i]);

drivers/gpu/drm/i915/intel_color.c

+3 −3
Original line number Diff line number Diff line
@@ -321,7 +321,7 @@ static void i9xx_load_luts_internal(struct intel_crtc_state *crtc_state, 
	enum pipe pipe = crtc->pipe;

	int i;



	if (HAS_GMCH_DISPLAY(dev_priv)) {

	if (HAS_GMCH(dev_priv)) {

		if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))

			assert_dsi_pll_enabled(dev_priv);

		else
@@ -336,7 +336,7 @@ static void i9xx_load_luts_internal(struct intel_crtc_state *crtc_state, 
				(drm_color_lut_extract(lut[i].green, 8) << 8) |

				drm_color_lut_extract(lut[i].blue, 8);



			if (HAS_GMCH_DISPLAY(dev_priv))

			if (HAS_GMCH(dev_priv))

				I915_WRITE(PALETTE(pipe, i), word);

			else

				I915_WRITE(LGC_PALETTE(pipe, i), word);
@@ -345,7 +345,7 @@ static void i9xx_load_luts_internal(struct intel_crtc_state *crtc_state, 
		for (i = 0; i < 256; i++) {

			u32 word = (i << 16) | (i << 8) | i;



			if (HAS_GMCH_DISPLAY(dev_priv))

			if (HAS_GMCH(dev_priv))

				I915_WRITE(PALETTE(pipe, i), word);

			else

				I915_WRITE(LGC_PALETTE(pipe, i), word);

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