ASoC: pxa2xx-i2s: Proper hw initialization (b243b77c) · Commits · 戴 / test

Make sure we are in a know good state at end of probe : Reset FIFO logic and registers, and make sure REC and RPL functions along with FIFO service are disabled (SACR0_RST enables REC and RPL). Resetting loses current settings so remove reset from stream startup. Now reset occurs only at probe. Signed-off-by:

Karl Beldan <karl.beldan@mobile-devices.fr> Signed-off-by:

Mark Brown <broonie@opensource.wolfsonmicro.com>

sound/soc/pxa/pxa2xx-i2s.c

+14 −3

Original line number	Diff line number	Diff line
		@@ -106,10 +106,8 @@ static int pxa2xx_i2s_startup(struct snd_pcm_substream *substream,
		if (IS_ERR(clk_i2s))
		return PTR_ERR(clk_i2s);

		if (!cpu_dai->active) {
		SACR0 \|= SACR0_RST;
		if (!cpu_dai->active)
		SACR0 = 0;
		}

		return 0;
		}
		@@ -347,6 +345,19 @@ static int pxa2xx_i2s_probe(struct platform_device *dev)
		if (ret != 0)
		clk_put(clk_i2s);

		/*
		* PXA Developer's Manual:
		* If SACR0[ENB] is toggled in the middle of a normal operation,
		* the SACR0[RST] bit must also be set and cleared to reset all
		* I2S controller registers.
		*/
		SACR0 = SACR0_RST;
		SACR0 = 0;
		/* Make sure RPL and REC are disabled */
		SACR1 = SACR1_DRPL \| SACR1_DREC;
		/* Along with FIFO servicing */
		SAIMR &= ~(SAIMR_RFS \| SAIMR_TFS);

		return ret;
		}

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