Commit b23b2b84 authored Jul 24, 2020 by Joel Stanley

ARM: dts: aspeed: rainier: Add CFAM reset GPIO



The GPIO on Q0 is used for resetting the CFAM of the processor that the
ASPEED master is connected to.

The signal is wired as active high on the first pass systems.

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>

parent 0ce0581e

arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts

+6 −0

Original line number	Diff line number	Diff line
		@@ -125,6 +125,12 @@
		#address-cells = <2>;
		#size-cells = <0>;

		/*
		* CFAM Reset is supposed to be active low but pass1 hardware is wired
		* active high.
		*/
		cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>;

		cfam@0,0 {
		reg = <0 0>;
		#address-cells = <1>;

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