Commit b234e8a0 authored Jun 21, 2016 by Thomas Garnier Committed by Ingo Molnar Jul 08, 2016

x86/mm: Separate variable for trampoline PGD



Use a separate global variable to define the trampoline PGD used to
start other processors. This change will allow KALSR memory
randomization to change the trampoline PGD to be correctly aligned with
physical memory.

Signed-off-by: Thomas Garnier <thgarnie@google.com>
Signed-off-by: Kees Cook <keescook@chromium.org>
Cc: Alexander Kuleshov <kuleshovmail@gmail.com>
Cc: Alexander Popov <alpopov@ptsecurity.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Cc: Baoquan He <bhe@redhat.com>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Borislav Petkov <bp@suse.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Christian Borntraeger <borntraeger@de.ibm.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Dave Young <dyoung@redhat.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Dmitry Vyukov <dvyukov@google.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Jan Beulich <JBeulich@suse.com>
Cc: Joerg Roedel <jroedel@suse.de>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Juergen Gross <jgross@suse.com>
Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Lv Zheng <lv.zheng@intel.com>
Cc: Mark Salter <msalter@redhat.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Matt Fleming <matt@codeblueprint.co.uk>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephen Smalley <sds@tycho.nsa.gov>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Toshi Kani <toshi.kani@hpe.com>
Cc: Xiao Guangrong <guangrong.xiao@linux.intel.com>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: kernel-hardening@lists.openwall.com
Cc: linux-doc@vger.kernel.org
Link: http://lkml.kernel.org/r/1466556426-32664-5-git-send-email-keescook@chromium.org


Signed-off-by: Ingo Molnar <mingo@kernel.org>

parent faa37933

arch/x86/include/asm/pgtable.h

+12 −0

Original line number	Diff line number	Diff line
		@@ -729,6 +729,18 @@ extern int direct_gbpages;
		void init_mem_mapping(void);
		void early_alloc_pgt_buf(void);

		#ifdef CONFIG_X86_64
		/* Realmode trampoline initialization. */
		extern pgd_t trampoline_pgd_entry;
		static inline void __meminit init_trampoline(void)
		{
		/* Default trampoline pgd value */
		trampoline_pgd_entry = init_level4_pgt[pgd_index(__PAGE_OFFSET)];
		}
		#else
		static inline void init_trampoline(void) { }
		#endif

		/* local pte updates need not use xchg for locking */
		static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
		{

arch/x86/mm/init.c

+3 −0

Original line number	Diff line number	Diff line
		@@ -590,6 +590,9 @@ void __init init_mem_mapping(void)
		/* the ISA range is always mapped regardless of memory holes */
		init_memory_mapping(0, ISA_END_ADDRESS);

		/* Init the trampoline, possibly with KASLR memory offset */
		init_trampoline();

		/*
		* If the allocation is in bottom-up direction, we setup direct mapping
		* in bottom-up, otherwise we setup direct mapping in top-down.

arch/x86/realmode/init.c

+4 −1

Original line number	Diff line number	Diff line
		@@ -8,6 +8,9 @@
		struct real_mode_header *real_mode_header;
		u32 *trampoline_cr4_features;

		/* Hold the pgd entry used on booting additional CPUs */
		pgd_t trampoline_pgd_entry;

		void __init reserve_real_mode(void)
		{
		phys_addr_t mem;
		@@ -84,7 +87,7 @@ void __init setup_real_mode(void)
		*trampoline_cr4_features = __read_cr4();

		trampoline_pgd = (u64 *) __va(real_mode_header->trampoline_pgd);
		trampoline_pgd[0] = init_level4_pgt[pgd_index(__PAGE_OFFSET)].pgd;
		trampoline_pgd[0] = trampoline_pgd_entry.pgd;
		trampoline_pgd[511] = init_level4_pgt[511].pgd;
		#endif
		}

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