Commit b21bb61d authored Feb 27, 2020 by Sibi Sankar Committed by Bjorn Andersson Mar 05, 2020

arm64: dts: qcom: sc7180: Add OSM L3 interconnect provider



Add Operation State Manager (OSM) L3 interconnect provider on SC7180 SoCs.

Acked-by: Georgi Djakov <georgi.djakov@linaro.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200227105632.15041-8-sibis@codeaurora.org


Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

parent 74f26599

arch/arm64/boot/dts/qcom/sc7180.dtsi

+10 −0

Original line number	Diff line number	Diff line
		@@ -1988,6 +1988,16 @@
		};
		};

		osm_l3: interconnect@18321000 {
		compatible = "qcom,sc7180-osm-l3";
		reg = <0 0x18321000 0 0x1400>;

		clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
		clock-names = "xo", "alternate";

		#interconnect-cells = <1>;
		};

		cpufreq_hw: cpufreq@18323000 {
		compatible = "qcom,cpufreq-hw";
		reg = <0 0x18323000 0 0x1400>, <0 0x18325800 0 0x1400>;

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