Commit b20f02e1 authored by Himanshu Madhani's avatar Himanshu Madhani Committed by Nicholas Bellinger
Browse files

qla2xxx: Enable target mode for ISP27XX 



Signed-off-by: default avatarHimanshu Madhani <himanshu.madhani@qlogic.com>
Signed-off-by: default avatarGiridhar Malavali <giridhar.malavali@qlogic.com>
Reviewed-by: default avatarNicholas Bellinger <nab@linux-iscsi.org>
Signed-off-by: default avatarNicholas Bellinger <nab@linux-iscsi.org>
parent ba9f6f64

drivers/scsi/qla2xxx/qla_attr.c

+1 −1
Original line number Diff line number Diff line
@@ -738,7 +738,7 @@ qla2x00_sysfs_write_reset(struct file *filp, struct kobject *kobj, 
		ql_log(ql_log_info, vha, 0x706f,

		    "Issuing MPI reset.\n");



		if (IS_QLA83XX(ha)) {

		if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {

			uint32_t idc_control;



			qla83xx_idc_lock(vha, 0);

drivers/scsi/qla2xxx/qla_def.h

+4 −4
Original line number Diff line number Diff line
@@ -3154,13 +3154,13 @@ struct qla_hw_data { 
/* Bit 21 of fw_attributes decides the MCTP capabilities */

#define IS_MCTP_CAPABLE(ha)	(IS_QLA2031(ha) && \

				((ha)->fw_attributes_ext[0] & BIT_0))

#define IS_PI_UNINIT_CAPABLE(ha)	(IS_QLA83XX(ha))

#define IS_PI_IPGUARD_CAPABLE(ha)	(IS_QLA83XX(ha))

#define IS_PI_UNINIT_CAPABLE(ha)	(IS_QLA83XX(ha) || IS_QLA27XX(ha))

#define IS_PI_IPGUARD_CAPABLE(ha)	(IS_QLA83XX(ha) || IS_QLA27XX(ha))

#define IS_PI_DIFB_DIX0_CAPABLE(ha)	(0)

#define IS_PI_SPLIT_DET_CAPABLE_HBA(ha)	(IS_QLA83XX(ha))

#define IS_PI_SPLIT_DET_CAPABLE_HBA(ha)	(IS_QLA83XX(ha) || IS_QLA27XX(ha))

#define IS_PI_SPLIT_DET_CAPABLE(ha)	(IS_PI_SPLIT_DET_CAPABLE_HBA(ha) && \

    (((ha)->fw_attributes_h << 16 | (ha)->fw_attributes) & BIT_22))

#define IS_ATIO_MSIX_CAPABLE(ha) (IS_QLA83XX(ha))

#define IS_ATIO_MSIX_CAPABLE(ha) (IS_QLA83XX(ha) || IS_QLA27XX(ha))

#define IS_TGT_MODE_CAPABLE(ha)	(ha->tgt.atio_q_length)

#define IS_SHADOW_REG_CAPABLE(ha)  (IS_QLA27XX(ha))

#define IS_DPORT_CAPABLE(ha)  (IS_QLA83XX(ha) || IS_QLA27XX(ha))

drivers/scsi/qla2xxx/qla_init.c

+2 −2
Original line number Diff line number Diff line
@@ -1538,7 +1538,7 @@ qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 
		mem_size = (ha->fw_memory_size - 0x11000 + 1) *

		    sizeof(uint16_t);

	} else if (IS_FWI2_CAPABLE(ha)) {

		if (IS_QLA83XX(ha))

		if (IS_QLA83XX(ha) || IS_QLA27XX(ha))

			fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);

		else if (IS_QLA81XX(ha))

			fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
@@ -1550,7 +1550,7 @@ qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 
		mem_size = (ha->fw_memory_size - 0x100000 + 1) *

		    sizeof(uint32_t);

		if (ha->mqenable) {

			if (!IS_QLA83XX(ha))

			if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))

				mq_size = sizeof(struct qla2xxx_mq_chain);

			/*

			 * Allocate maximum buffer size for all queues.

drivers/scsi/qla2xxx/qla_mbx.c

+4 −3
Original line number Diff line number Diff line
@@ -2415,7 +2415,8 @@ qla2x00_get_resource_cnts(scsi_qla_host_t *vha, uint16_t *cur_xchg_cnt, 
			*orig_iocb_cnt = mcp->mb[10];

		if (vha->hw->flags.npiv_supported && max_npiv_vports)

			*max_npiv_vports = mcp->mb[11];

		if ((IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw)) && max_fcfs)

		if ((IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw) ||

		    IS_QLA27XX(vha->hw)) && max_fcfs)

			*max_fcfs = mcp->mb[12];

	}
@@ -3898,7 +3899,7 @@ qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp) 
	spin_lock_irqsave(&ha->hardware_lock, flags);

	if (!(rsp->options & BIT_0)) {

		WRT_REG_DWORD(rsp->rsp_q_out, 0);

		if (!IS_QLA83XX(ha))

		if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))

			WRT_REG_DWORD(rsp->rsp_q_in, 0);

	}
@@ -5345,7 +5346,7 @@ qla83xx_restart_nic_firmware(scsi_qla_host_t *vha) 
	mbx_cmd_t *mcp = &mc;

	struct qla_hw_data *ha = vha->hw;



	if (!IS_QLA83XX(ha))

	if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))

		return QLA_FUNCTION_FAILED;



	ql_dbg(ql_dbg_mbx, vha, 0x1143, "Entered %s.\n", __func__);

drivers/scsi/qla2xxx/qla_os.c

+1 −0
Original line number Diff line number Diff line
@@ -2504,6 +2504,7 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) 
		ha->mbx_count = MAILBOX_REGISTER_COUNT;

		req_length = REQUEST_ENTRY_CNT_24XX;

		rsp_length = RESPONSE_ENTRY_CNT_2300;

		ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;

		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;

		ha->init_cb_size = sizeof(struct mid_init_cb_81xx);

		ha->gid_list_info_size = 8;

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