Commit b1da91c9 authored Sep 24, 2019 by Chris Wilson

drm/i915/tgl: Swap engines for no rps (gpu reclocking)

If we disable rps, it appears the Tigerlake is stable enough to run
multiple engines simultaneously in CI. As disabling rps should only
cause the execution to be slow, whereas many features depend on the
different engines, we would prefer to have the engines enabled while the
machine hangs are being debugged.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111714

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190924173501.21956-1-chris@chris-wilson.co.uk

parent 6ea3cee6

drivers/gpu/drm/i915/i915_pci.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -807,7 +807,7 @@ static const struct intel_device_info intel_tigerlake_12_info = {
		.display.has_modular_fia = 1,
		.engine_mask =
		BIT(RCS0) \| BIT(BCS0) \| BIT(VECS0) \| BIT(VCS0) \| BIT(VCS2),
		.engine_mask = BIT(RCS0), /* XXX reduced for debugging */
		.has_rps = false, /* XXX disabled for debugging */
		};

		#undef GEN