drm/i915/selftests: Skip RPS tests on Ironlake (only IPS) (b1cff585) · Commits · 戴 / test

Since Ironlake uses intel_ips.ko for its dynamic frequency adjustment, we do not have direct control over the frequency management so such tests are defunct. Similarly, we can't check the gen6+ RPS registers on Ironlake. Hopefully this catches all the invalid tests now that Ironlake has rejoined the dynamic GPU frequency club. There is an opportunity for the reader to add tests to exercise MEMINTRSTS and co. Signed-off-by:

Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by:

Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201022210814.23004-1-chris@chris-wilson.co.uk

drivers/gpu/drm/i915/gt/selftest_rps.c

+4 −4

Original line number	Diff line number	Diff line
		@@ -219,7 +219,7 @@ int live_rps_clock_interval(void *arg)
		struct igt_spinner spin;
		int err = 0;

		if (!intel_rps_is_enabled(rps))
		if (!intel_rps_is_enabled(rps) \|\| INTEL_GEN(gt->i915) < 6)
		return 0;

		if (igt_spinner_init(&spin, gt))
		@@ -1028,7 +1028,7 @@ int live_rps_interrupt(void *arg)
		* First, let's check whether or not we are receiving interrupts.
		*/

		if (!intel_rps_has_interrupts(rps))
		if (!intel_rps_has_interrupts(rps) \|\| INTEL_GEN(gt->i915) < 6)
		return 0;

		intel_gt_pm_get(gt);
		@@ -1133,7 +1133,7 @@ int live_rps_power(void *arg)
		* that theory.
		*/

		if (!intel_rps_is_enabled(rps))
		if (!intel_rps_is_enabled(rps) \|\| INTEL_GEN(gt->i915) < 6)
		return 0;

		if (!librapl_energy_uJ())
		@@ -1237,7 +1237,7 @@ int live_rps_dynamic(void *arg)
		* moving parts into dynamic reclocking based on load.
		*/

		if (!intel_rps_is_enabled(rps))
		if (!intel_rps_is_enabled(rps) \|\| INTEL_GEN(gt->i915) < 6)
		return 0;

		if (igt_spinner_init(&spin, gt))

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