Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6 (b1af9ccc) · Commits · 戴 / test

arch/sh/Kconfig

+27 −3

Original line number	Original line	Diff line number	Diff line
	@@ -167,6 +167,12 @@ config CPU_SUBTYPE_SH7263
	select CPU_SH2A		select CPU_SH2A
	select CPU_HAS_FPU		select CPU_HAS_FPU

			config CPU_SUBTYPE_MXG
			bool "Support MX-G processor"
			select CPU_SH2A
			help
			Select MX-G if running on an R8A03022BG part.

	# SH-3 Processor Support		# SH-3 Processor Support

	config CPU_SUBTYPE_SH7705		config CPU_SUBTYPE_SH7705
	@@ -270,6 +276,15 @@ config CPU_SUBTYPE_SH4_202

	# SH-4A Processor Support		# SH-4A Processor Support

			config CPU_SUBTYPE_SH7723
			bool "Support SH7723 processor"
			select CPU_SH4A
			select CPU_SHX2
			select ARCH_SPARSEMEM_ENABLE
			select SYS_SUPPORTS_NUMA
			help
			Select SH7723 if you have an SH-MobileR2 CPU.

	config CPU_SUBTYPE_SH7763		config CPU_SUBTYPE_SH7763
	bool "Support SH7763 processor"		bool "Support SH7763 processor"
	select CPU_SH4A		select CPU_SH4A
	@@ -366,6 +381,14 @@ config SH_7619_SOLUTION_ENGINE
	Select 7619 SolutionEngine if configuring for a Hitachi SH7619		Select 7619 SolutionEngine if configuring for a Hitachi SH7619
	evaluation board.		evaluation board.

			config SH_7721_SOLUTION_ENGINE
			bool "SolutionEngine7721"
			select SOLUTION_ENGINE
			depends on CPU_SUBTYPE_SH7721
			help
			Select 7721 SolutionEngine if configuring for a Hitachi SH7721
			evaluation board.

	config SH_7722_SOLUTION_ENGINE		config SH_7722_SOLUTION_ENGINE
	bool "SolutionEngine7722"		bool "SolutionEngine7722"
	select SOLUTION_ENGINE		select SOLUTION_ENGINE
	@@ -560,7 +583,7 @@ config SH_TMU
	config SH_CMT		config SH_CMT
	def_bool y		def_bool y
	prompt "CMT timer support"		prompt "CMT timer support"
	depends on CPU_SH2		depends on CPU_SH2 && !CPU_SUBTYPE_MXG
	help		help
	This enables the use of the CMT as the system timer.		This enables the use of the CMT as the system timer.

	@@ -578,6 +601,7 @@ config SH_TIMER_IRQ
	default "86" if CPU_SUBTYPE_SH7619		default "86" if CPU_SUBTYPE_SH7619
	default "140" if CPU_SUBTYPE_SH7206		default "140" if CPU_SUBTYPE_SH7206
	default "142" if CPU_SUBTYPE_SH7203		default "142" if CPU_SUBTYPE_SH7203
			default "238" if CPU_SUBTYPE_MXG
	default "16"		default "16"

	config SH_PCLK_FREQ		config SH_PCLK_FREQ
	@@ -585,10 +609,10 @@ config SH_PCLK_FREQ
	default "27000000" if CPU_SUBTYPE_SH7343		default "27000000" if CPU_SUBTYPE_SH7343
	default "31250000" if CPU_SUBTYPE_SH7619		default "31250000" if CPU_SUBTYPE_SH7619
	default "32000000" if CPU_SUBTYPE_SH7722		default "32000000" if CPU_SUBTYPE_SH7722
	default "33333333" if CPU_SUBTYPE_SH7770 \|\| \		default "33333333" if CPU_SUBTYPE_SH7770 \|\| CPU_SUBTYPE_SH7723 \|\| \
	CPU_SUBTYPE_SH7760 \|\| CPU_SUBTYPE_SH7705 \|\| \		CPU_SUBTYPE_SH7760 \|\| CPU_SUBTYPE_SH7705 \|\| \
	CPU_SUBTYPE_SH7203 \|\| CPU_SUBTYPE_SH7206 \|\| \		CPU_SUBTYPE_SH7203 \|\| CPU_SUBTYPE_SH7206 \|\| \
	CPU_SUBTYPE_SH7263		CPU_SUBTYPE_SH7263 \|\| CPU_SUBTYPE_MXG
	default "60000000" if CPU_SUBTYPE_SH7751 \|\| CPU_SUBTYPE_SH7751R		default "60000000" if CPU_SUBTYPE_SH7751 \|\| CPU_SUBTYPE_SH7751R
	default "66000000" if CPU_SUBTYPE_SH4_202		default "66000000" if CPU_SUBTYPE_SH4_202
	default "50000000"		default "50000000"

arch/sh/Kconfig.debug

+7 −6

Original line number	Original line	Diff line number	Diff line
	@@ -29,16 +29,17 @@ config EARLY_SCIF_CONSOLE
	config EARLY_SCIF_CONSOLE_PORT		config EARLY_SCIF_CONSOLE_PORT
	hex		hex
	depends on EARLY_SCIF_CONSOLE		depends on EARLY_SCIF_CONSOLE
	default "0xffe00000" if CPU_SUBTYPE_SH7780 \|\| CPU_SUBTYPE_SH7763
	default "0xffe00000" if CPU_SUBTYPE_SH7722 \|\| CPU_SUBTYPE_SH7366
	default "0xffea0000" if CPU_SUBTYPE_SH7785
	default "0xfffe8000" if CPU_SUBTYPE_SH7203
	default "0xfffe9800" if CPU_SUBTYPE_SH7206 \|\| CPU_SUBTYPE_SH7263
	default "0xf8420000" if CPU_SUBTYPE_SH7619
	default "0xa4400000" if CPU_SUBTYPE_SH7712 \|\| CPU_SUBTYPE_SH7705		default "0xa4400000" if CPU_SUBTYPE_SH7712 \|\| CPU_SUBTYPE_SH7705
	default "0xa4430000" if CPU_SUBTYPE_SH7720 \|\| CPU_SUBTYPE_SH7721		default "0xa4430000" if CPU_SUBTYPE_SH7720 \|\| CPU_SUBTYPE_SH7721
			default "0xf8420000" if CPU_SUBTYPE_SH7619
			default "0xff804000" if CPU_SUBTYPE_MXG
	default "0xffc30000" if CPU_SUBTYPE_SHX3		default "0xffc30000" if CPU_SUBTYPE_SHX3
			default "0xffe00000" if CPU_SUBTYPE_SH7780 \|\| CPU_SUBTYPE_SH7763 \|\| \
			CPU_SUBTYPE_SH7722 \|\| CPU_SUBTYPE_SH7366
	default "0xffe80000" if CPU_SH4		default "0xffe80000" if CPU_SH4
			default "0xffea0000" if CPU_SUBTYPE_SH7785
			default "0xfffe8000" if CPU_SUBTYPE_SH7203
			default "0xfffe9800" if CPU_SUBTYPE_SH7206 \|\| CPU_SUBTYPE_SH7263
	default "0x00000000"		default "0x00000000"

	config EARLY_PRINTK		config EARLY_PRINTK

arch/sh/Makefile

+1 −0

Original line number	Original line	Diff line number	Diff line
	@@ -107,6 +107,7 @@ machdir-$(CONFIG_SH_7722_SOLUTION_ENGINE) += se/7722
	machdir-$(CONFIG_SH_7751_SOLUTION_ENGINE) += se/7751		machdir-$(CONFIG_SH_7751_SOLUTION_ENGINE) += se/7751
	machdir-$(CONFIG_SH_7780_SOLUTION_ENGINE) += se/7780		machdir-$(CONFIG_SH_7780_SOLUTION_ENGINE) += se/7780
	machdir-$(CONFIG_SH_7343_SOLUTION_ENGINE) += se/7343		machdir-$(CONFIG_SH_7343_SOLUTION_ENGINE) += se/7343
			machdir-$(CONFIG_SH_7721_SOLUTION_ENGINE) += se/7721
	machdir-$(CONFIG_SH_HP6XX) += hp6xx		machdir-$(CONFIG_SH_HP6XX) += hp6xx
	machdir-$(CONFIG_SH_DREAMCAST) += dreamcast		machdir-$(CONFIG_SH_DREAMCAST) += dreamcast
	machdir-$(CONFIG_SH_MPC1211) += mpc1211		machdir-$(CONFIG_SH_MPC1211) += mpc1211

arch/sh/boards/renesas/migor/setup.c

+193 −4

Original line number	Original line	Diff line number	Diff line
	@@ -10,8 +10,14 @@
	#include <linux/init.h>		#include <linux/init.h>
	#include <linux/platform_device.h>		#include <linux/platform_device.h>
	#include <linux/interrupt.h>		#include <linux/interrupt.h>
			#include <linux/input.h>
			#include <linux/mtd/physmap.h>
			#include <linux/mtd/nand.h>
			#include <linux/i2c.h>
	#include <asm/machvec.h>		#include <asm/machvec.h>
	#include <asm/io.h>		#include <asm/io.h>
			#include <asm/sh_keysc.h>
			#include <asm/migor.h>

	/* Address IRQ Size Bus Description		/* Address IRQ Size Bus Description
	* 0x00000000 64MB 16 NOR Flash (SP29PL256N)		* 0x00000000 64MB 16 NOR Flash (SP29PL256N)
	@@ -23,9 +29,9 @@

	static struct resource smc91x_eth_resources[] = {		static struct resource smc91x_eth_resources[] = {
	[0] = {		[0] = {
	.name = "smc91x-regs" ,		.name = "SMC91C111" ,
	.start = P2SEGADDR(0x10000300),		.start = 0x10000300,
	.end = P2SEGADDR(0x1000030f),		.end = 0x1000030f,
	.flags = IORESOURCE_MEM,		.flags = IORESOURCE_MEM,
	},		},
	[1] = {		[1] = {
	@@ -40,19 +46,202 @@ static struct platform_device smc91x_eth_device = {
	.resource = smc91x_eth_resources,		.resource = smc91x_eth_resources,
	};		};

			static struct sh_keysc_info sh_keysc_info = {
			.mode = SH_KEYSC_MODE_2, /* KEYOUT0->4, KEYIN1->5 */
			.scan_timing = 3,
			.delay = 5,
			.keycodes = {
			0, KEY_UP, KEY_DOWN, KEY_LEFT, KEY_RIGHT, KEY_ENTER,
			0, KEY_F, KEY_C, KEY_D, KEY_H, KEY_1,
			0, KEY_2, KEY_3, KEY_4, KEY_5, KEY_6,
			0, KEY_7, KEY_8, KEY_9, KEY_S, KEY_0,
			0, KEY_P, KEY_STOP, KEY_REWIND, KEY_PLAY, KEY_FASTFORWARD,
			},
			};

			static struct resource sh_keysc_resources[] = {
			[0] = {
			.start = 0x044b0000,
			.end = 0x044b000f,
			.flags = IORESOURCE_MEM,
			},
			[1] = {
			.start = 79,
			.flags = IORESOURCE_IRQ,
			},
			};

			static struct platform_device sh_keysc_device = {
			.name = "sh_keysc",
			.num_resources = ARRAY_SIZE(sh_keysc_resources),
			.resource = sh_keysc_resources,
			.dev = {
			.platform_data = &sh_keysc_info,
			},
			};

			static struct mtd_partition migor_nor_flash_partitions[] =
			{
			{
			.name = "uboot",
			.offset = 0,
			.size = (1 * 1024 * 1024),
			.mask_flags = MTD_WRITEABLE, /* Read-only */
			},
			{
			.name = "rootfs",
			.offset = MTDPART_OFS_APPEND,
			.size = (15 * 1024 * 1024),
			},
			{
			.name = "other",
			.offset = MTDPART_OFS_APPEND,
			.size = MTDPART_SIZ_FULL,
			},
			};

			static struct physmap_flash_data migor_nor_flash_data = {
			.width = 2,
			.parts = migor_nor_flash_partitions,
			.nr_parts = ARRAY_SIZE(migor_nor_flash_partitions),
			};

			static struct resource migor_nor_flash_resources[] = {
			[0] = {
			.name = "NOR Flash",
			.start = 0x00000000,
			.end = 0x03ffffff,
			.flags = IORESOURCE_MEM,
			}
			};

			static struct platform_device migor_nor_flash_device = {
			.name = "physmap-flash",
			.resource = migor_nor_flash_resources,
			.num_resources = ARRAY_SIZE(migor_nor_flash_resources),
			.dev = {
			.platform_data = &migor_nor_flash_data,
			},
			};

			static struct mtd_partition migor_nand_flash_partitions[] = {
			{
			.name = "nanddata1",
			.offset = 0x0,
			.size = 512 * 1024 * 1024,
			},
			{
			.name = "nanddata2",
			.offset = MTDPART_OFS_APPEND,
			.size = 512 * 1024 * 1024,
			},
			};

			static void migor_nand_flash_cmd_ctl(struct mtd_info *mtd, int cmd,
			unsigned int ctrl)
			{
			struct nand_chip *chip = mtd->priv;

			if (cmd == NAND_CMD_NONE)
			return;

			if (ctrl & NAND_CLE)
			writeb(cmd, chip->IO_ADDR_W + 0x00400000);
			else if (ctrl & NAND_ALE)
			writeb(cmd, chip->IO_ADDR_W + 0x00800000);
			else
			writeb(cmd, chip->IO_ADDR_W);
			}

			static int migor_nand_flash_ready(struct mtd_info *mtd)
			{
			return ctrl_inb(PORT_PADR) & 0x02; /* PTA1 */
			}

			struct platform_nand_data migor_nand_flash_data = {
			.chip = {
			.nr_chips = 1,
			.partitions = migor_nand_flash_partitions,
			.nr_partitions = ARRAY_SIZE(migor_nand_flash_partitions),
			.chip_delay = 20,
			.part_probe_types = (const char *[]) { "cmdlinepart", NULL },
			},
			.ctrl = {
			.dev_ready = migor_nand_flash_ready,
			.cmd_ctrl = migor_nand_flash_cmd_ctl,
			},
			};

			static struct resource migor_nand_flash_resources[] = {
			[0] = {
			.name = "NAND Flash",
			.start = 0x18000000,
			.end = 0x18ffffff,
			.flags = IORESOURCE_MEM,
			},
			};

			static struct platform_device migor_nand_flash_device = {
			.name = "gen_nand",
			.resource = migor_nand_flash_resources,
			.num_resources = ARRAY_SIZE(migor_nand_flash_resources),
			.dev = {
			.platform_data = &migor_nand_flash_data,
			}
			};

	static struct platform_device *migor_devices[] __initdata = {		static struct platform_device *migor_devices[] __initdata = {
	&smc91x_eth_device,		&smc91x_eth_device,
			&sh_keysc_device,
			&migor_nor_flash_device,
			&migor_nand_flash_device,
			};

			static struct i2c_board_info __initdata migor_i2c_devices[] = {
			{
			I2C_BOARD_INFO("rtc-rs5c372", 0x32),
			.type = "rs5c372b",
			},
			{
			I2C_BOARD_INFO("migor_ts", 0x51),
			.irq = 38, /* IRQ6 */
			},
	};		};

	static int __init migor_devices_setup(void)		static int __init migor_devices_setup(void)
	{		{
			i2c_register_board_info(0, migor_i2c_devices,
			ARRAY_SIZE(migor_i2c_devices));

	return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices));		return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices));
	}		}
	__initcall(migor_devices_setup);		__initcall(migor_devices_setup);

	static void __init migor_setup(char **cmdline_p)		static void __init migor_setup(char **cmdline_p)
	{		{
	ctrl_outw(0x1000, 0xa4050110); /* Enable IRQ0 in PJCR */		/* SMC91C111 - Enable IRQ0 */
			ctrl_outw(ctrl_inw(PORT_PJCR) & ~0x0003, PORT_PJCR);

			/* KEYSC */
			ctrl_outw(ctrl_inw(PORT_PYCR) & ~0x0fff, PORT_PYCR);
			ctrl_outw(ctrl_inw(PORT_PZCR) & ~0x0ff0, PORT_PZCR);
			ctrl_outw(ctrl_inw(PORT_PSELA) & ~0x4100, PORT_PSELA);
			ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
			ctrl_outw(ctrl_inw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
			ctrl_outl(ctrl_inl(MSTPCR2) & ~0x00004000, MSTPCR2);

			/* NAND Flash */
			ctrl_outw(ctrl_inw(PORT_PXCR) & 0x0fff, PORT_PXCR);
			ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x00000600) \| 0x00000200,
			BSC_CS6ABCR);

			/* I2C */
			ctrl_outl(ctrl_inl(MSTPCR1) & ~0x00000200, MSTPCR1);

			/* Touch Panel - Enable IRQ6 */
			ctrl_outw(ctrl_inw(PORT_PZCR) & ~0xc, PORT_PZCR);
			ctrl_outw((ctrl_inw(PORT_PSELA) \| 0x8000), PORT_PSELA);
			ctrl_outw((ctrl_inw(PORT_HIZCRC) & ~0x4000), PORT_HIZCRC);
	}		}

	static struct sh_machine_vector mv_migor __initmv = {		static struct sh_machine_vector mv_migor __initmv = {

arch/sh/boards/renesas/r7780rp/irq-r7780mp.c

+26 −13

Original line number	Original line	Diff line number	Diff line
	@@ -18,31 +18,44 @@ enum {
	UNUSED = 0,		UNUSED = 0,

	/* board specific interrupt sources */		/* board specific interrupt sources */
	AX88796, /* Ethernet controller */
	CF, /* Compact Flash */		CF, /* Compact Flash */
			TP, /* Touch panel */
			SCIF1, /* FPGA SCIF1 */
			SCIF0, /* FPGA SCIF0 */
			SMBUS, /* SMBUS */
			RTC, /* RTC Alarm */
			AX88796, /* Ethernet controller */
	PSW, /* Push Switch */		PSW, /* Push Switch */
	EXT1, /* EXT1n IRQ */
	EXT4, /* EXT4n IRQ */		/* external bus connector */
			EXT1, EXT2, EXT4, EXT5, EXT6,
	};		};

	static struct intc_vect vectors[] __initdata = {		static struct intc_vect vectors[] __initdata = {
	INTC_IRQ(CF, IRQ_CF),		INTC_IRQ(CF, IRQ_CF),
	INTC_IRQ(PSW, IRQ_PSW),		INTC_IRQ(TP, IRQ_TP),
			INTC_IRQ(SCIF1, IRQ_SCIF1),
			INTC_IRQ(SCIF0, IRQ_SCIF0),
			INTC_IRQ(SMBUS, IRQ_SMBUS),
			INTC_IRQ(RTC, IRQ_RTC),
	INTC_IRQ(AX88796, IRQ_AX88796),		INTC_IRQ(AX88796, IRQ_AX88796),
	INTC_IRQ(EXT1, IRQ_EXT1),		INTC_IRQ(PSW, IRQ_PSW),
	INTC_IRQ(EXT4, IRQ_EXT4),
			INTC_IRQ(EXT1, IRQ_EXT1), INTC_IRQ(EXT2, IRQ_EXT2),
			INTC_IRQ(EXT4, IRQ_EXT4), INTC_IRQ(EXT5, IRQ_EXT5),
			INTC_IRQ(EXT6, IRQ_EXT6),
	};		};

	static struct intc_mask_reg mask_registers[] __initdata = {		static struct intc_mask_reg mask_registers[] __initdata = {
	{ 0xa4000000, 0, 16, /* IRLMSK */		{ 0xa4000000, 0, 16, /* IRLMSK */
	{ 0, 0, 0, 0, CF, 0, 0, 0,		{ SCIF0, SCIF1, RTC, 0, CF, 0, TP, SMBUS,
	0, 0, 0, EXT4, 0, EXT1, PSW, AX88796 } },		0, EXT6, EXT5, EXT4, EXT2, EXT1, PSW, AX88796 } },
	};		};

	static unsigned char irl2irq[HL_NR_IRL] __initdata = {		static unsigned char irl2irq[HL_NR_IRL] __initdata = {
	0, IRQ_CF, 0, 0,		0, IRQ_CF, IRQ_TP, IRQ_SCIF1,
	0, 0, 0, 0,		IRQ_SCIF0, IRQ_SMBUS, IRQ_RTC, IRQ_EXT6,
	0, IRQ_EXT4, 0, IRQ_EXT1,		IRQ_EXT5, IRQ_EXT4, IRQ_EXT2, IRQ_EXT1,
	0, IRQ_AX88796, IRQ_PSW,		0, IRQ_AX88796, IRQ_PSW,
	};		};

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