Commit b053bc71 authored by Chao Hao's avatar Chao Hao Committed by Joerg Roedel
Browse files

iommu/mediatek: Move inv_sel_reg into the plat_data 



For mt6779, MMU_INV_SEL register's offset is changed from
0x38 to 0x2c, so we can put inv_sel_reg in the plat_data to
use it.
In addition, we renamed it to REG_MMU_INV_SEL_GEN1 and use it
before mt6779.

Signed-off-by: default avatarChao Hao <chao.hao@mediatek.com>
Reviewed-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
Cc: Yong Wu <yong.wu@mediatek.com>
Link: https://lore.kernel.org/r/20200703044127.27438-6-chao.hao@mediatek.com


Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
parent 4bb2bf4c

drivers/iommu/mtk_iommu.c

+6 −3
Original line number Diff line number Diff line
@@ -37,7 +37,7 @@ 
#define REG_MMU_INVLD_START_A			0x024

#define REG_MMU_INVLD_END_A			0x028



#define REG_MMU_INV_SEL				0x038

#define REG_MMU_INV_SEL_GEN1			0x038

#define F_INVLD_EN0				BIT(0)

#define F_INVLD_EN1				BIT(1)
@@ -178,7 +178,7 @@ static void mtk_iommu_tlb_flush_all(void *cookie) 


	for_each_m4u(data) {

		writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0,

			       data->base + REG_MMU_INV_SEL);

			       data->base + data->plat_data->inv_sel_reg);

		writel_relaxed(F_ALL_INVLD, data->base + REG_MMU_INVALIDATE);

		wmb(); /* Make sure the tlb flush all done */

	}
@@ -195,7 +195,7 @@ static void mtk_iommu_tlb_flush_range_sync(unsigned long iova, size_t size, 
	for_each_m4u(data) {

		spin_lock_irqsave(&data->tlb_lock, flags);

		writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0,

			       data->base + REG_MMU_INV_SEL);

			       data->base + data->plat_data->inv_sel_reg);



		writel_relaxed(iova, data->base + REG_MMU_INVLD_START_A);

		writel_relaxed(iova + size - 1,
@@ -784,18 +784,21 @@ static const struct dev_pm_ops mtk_iommu_pm_ops = { 
static const struct mtk_iommu_plat_data mt2712_data = {

	.m4u_plat     = M4U_MT2712,

	.flags        = HAS_4GB_MODE | HAS_BCLK | HAS_VLD_PA_RNG,

	.inv_sel_reg  = REG_MMU_INV_SEL_GEN1,

	.larbid_remap = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9},

};



static const struct mtk_iommu_plat_data mt8173_data = {

	.m4u_plat     = M4U_MT8173,

	.flags	      = HAS_4GB_MODE | HAS_BCLK | RESET_AXI,

	.inv_sel_reg  = REG_MMU_INV_SEL_GEN1,

	.larbid_remap = {0, 1, 2, 3, 4, 5}, /* Linear mapping. */

};



static const struct mtk_iommu_plat_data mt8183_data = {

	.m4u_plat     = M4U_MT8183,

	.flags        = RESET_AXI,

	.inv_sel_reg  = REG_MMU_INV_SEL_GEN1,

	.larbid_remap = {0, 4, 5, 6, 7, 2, 3, 1},

};

drivers/iommu/mtk_iommu.h

+1 −0
Original line number Diff line number Diff line
@@ -40,6 +40,7 @@ enum mtk_iommu_plat { 
struct mtk_iommu_plat_data {

	enum mtk_iommu_plat m4u_plat;

	u32                 flags;

	u32                 inv_sel_reg;

	unsigned char       larbid_remap[MTK_LARB_NR_MAX];

};

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