Commit b053b2ae authored by Steve Rutherford's avatar Steve Rutherford Committed by Paolo Bonzini
Browse files

KVM: x86: Add EOI exit bitmap inference 



In order to support a userspace IOAPIC interacting with an in kernel
APIC, the EOI exit bitmaps need to be configurable.

If the IOAPIC is in userspace (i.e. the irqchip has been split), the
EOI exit bitmaps will be set whenever the GSI Routes are configured.
In particular, for the low MSI routes are reservable for userspace
IOAPICs. For these MSI routes, the EOI Exit bit corresponding to the
destination vector of the route will be set for the destination VCPU.

The intention is for the userspace IOAPICs to use the reservable MSI
routes to inject interrupts into the guest.

This is a slight abuse of the notion of an MSI Route, given that MSIs
classically bypass the IOAPIC. It might be worthwhile to add an
additional route type to improve clarity.

Compile tested for Intel x86.

Signed-off-by: default avatarSteve Rutherford <srutherford@google.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent 7543a635

Documentation/virtual/kvm/api.txt

+6 −3
Original line number Diff line number Diff line
@@ -3642,7 +3642,7 @@ KVM handlers should exit to userspace with rc = -EREMOTE. 
7.5 KVM_CAP_SPLIT_IRQCHIP



Architectures: x86

Parameters: None

Parameters: args[0] - number of routes reserved for userspace IOAPICs

Returns: 0 on success, -1 on error



Create a local apic for each processor in the kernel. This can be used
@@ -3650,8 +3650,11 @@ instead of KVM_CREATE_IRQCHIP if the userspace VMM wishes to emulate the 
IOAPIC and PIC (and also the PIT, even though this has to be enabled

separately).



This supersedes KVM_CREATE_IRQCHIP, creating only local APICs, but no in kernel

IOAPIC or PIC. This also enables in kernel routing of interrupt requests.

This capability also enables in kernel routing of interrupt requests;

when KVM_CAP_SPLIT_IRQCHIP only routes of KVM_IRQ_ROUTING_MSI type are

used in the IRQ routing table.  The first args[0] MSI routes are reserved

for the IOAPIC pins.  Whenever the LAPIC receives an EOI for these routes,

a KVM_EXIT_IOAPIC_EOI vmexit will be reported to userspace.



Fails if VCPU has already been created, or if the irqchip is already in the

kernel (i.e. KVM_CREATE_IRQCHIP has already been called).

arch/x86/include/asm/kvm_host.h

+1 −0
Original line number Diff line number Diff line
@@ -688,6 +688,7 @@ struct kvm_arch { 
	u64 disabled_quirks;



	bool irqchip_split;

	u8 nr_reserved_ioapic_pins;

};



struct kvm_vm_stat {

arch/x86/kvm/ioapic.h

+2 −0
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ struct kvm; 
struct kvm_vcpu;



#define IOAPIC_NUM_PINS  KVM_IOAPIC_NUM_PINS

#define MAX_NR_RESERVED_IOAPIC_PINS KVM_MAX_IRQ_ROUTES

#define IOAPIC_VERSION_ID 0x11	/* IOAPIC version */

#define IOAPIC_EDGE_TRIG  0

#define IOAPIC_LEVEL_TRIG 1
@@ -121,5 +122,6 @@ int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src, 
int kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state);

int kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state);

void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);

void kvm_scan_ioapic_routes(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);



#endif

arch/x86/kvm/irq_comm.c

+42 −0
Original line number Diff line number Diff line
@@ -335,3 +335,45 @@ int kvm_setup_empty_irq_routing(struct kvm *kvm) 
{

	return kvm_set_irq_routing(kvm, empty_routing, 0, 0);

}



void kvm_arch_irq_routing_update(struct kvm *kvm)

{

	if (ioapic_in_kernel(kvm) || !irqchip_in_kernel(kvm))

		return;

	kvm_make_scan_ioapic_request(kvm);

}



void kvm_scan_ioapic_routes(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap)

{

	struct kvm *kvm = vcpu->kvm;

	struct kvm_kernel_irq_routing_entry *entry;

	struct kvm_irq_routing_table *table;

	u32 i, nr_ioapic_pins;

	int idx;



	/* kvm->irq_routing must be read after clearing

	 * KVM_SCAN_IOAPIC. */

	smp_mb();

	idx = srcu_read_lock(&kvm->irq_srcu);

	table = srcu_dereference(kvm->irq_routing, &kvm->irq_srcu);

	nr_ioapic_pins = min_t(u32, table->nr_rt_entries,

			       kvm->arch.nr_reserved_ioapic_pins);

	for (i = 0; i < nr_ioapic_pins; ++i) {

		hlist_for_each_entry(entry, &table->map[i], link) {

			u32 dest_id, dest_mode;



			if (entry->type != KVM_IRQ_ROUTING_MSI)

				continue;

			dest_id = (entry->msi.address_lo >> 12) & 0xff;

			dest_mode = (entry->msi.address_lo >> 2) & 0x1;

			if (kvm_apic_match_dest(vcpu, NULL, 0, dest_id,

						dest_mode)) {

				u32 vector = entry->msi.data & 0xff;



				__set_bit(vector,

					  (unsigned long *) eoi_exit_bitmap);

			}

		}

	}

	srcu_read_unlock(&kvm->irq_srcu, idx);

}

arch/x86/kvm/lapic.c

+1 −2
Original line number Diff line number Diff line
@@ -209,8 +209,7 @@ out: 
	if (old)

		kfree_rcu(old, rcu);



	if (ioapic_in_kernel(kvm))

		kvm_vcpu_request_scan_ioapic(kvm);

	kvm_make_scan_ioapic_request(kvm);

}



static inline void apic_set_spiv(struct kvm_lapic *apic, u32 val)

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