Commit b026a7ec authored by chunhui dai's avatar chunhui dai Committed by Stephen Boyd
Browse files

clk: mediatek: add MUX_GATE_FLAGS_2 



Add MUX_GATE_FLAGS_2 for the clock which needs to set two falgs.
Such as some mux need to set the flags of "CLK_MUX_ROUND_CLOSEST".

Signed-off-by: default avatarchunhui dai <chunhui.dai@mediatek.com>
Signed-off-by: default avatarwangyan wang <wangyan.wang@mediatek.com>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent bfeffd15

drivers/clk/mediatek/clk-mtk.c

+1 −1
Original line number Diff line number Diff line
@@ -167,7 +167,7 @@ struct clk *mtk_clk_register_composite(const struct mtk_composite *mc, 
		mux->mask = BIT(mc->mux_width) - 1;

		mux->shift = mc->mux_shift;

		mux->lock = lock;



		mux->flags = mc->mux_flags;

		mux_hw = &mux->hw;

		mux_ops = &clk_mux_ops;

drivers/clk/mediatek/clk-mtk.h

+14 −6
Original line number Diff line number Diff line
@@ -81,15 +81,13 @@ struct mtk_composite { 
	signed char divider_shift;

	signed char divider_width;



	u8 mux_flags;



	signed char num_parents;

};



/*

 * In case the rate change propagation to parent clocks is undesirable,

 * this macro allows to specify the clock flags manually.

 */

#define MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width,	\

			_gate, _flags) {				\

#define MUX_GATE_FLAGS_2(_id, _name, _parents, _reg, _shift,		\

				_width, _gate, _flags, _muxflags) {	\

		.id = _id,						\

		.name = _name,						\

		.mux_reg = _reg,					\
@@ -101,8 +99,18 @@ struct mtk_composite { 
		.parent_names = _parents,				\

		.num_parents = ARRAY_SIZE(_parents),			\

		.flags = _flags,					\

		.mux_flags = _muxflags,					\

	}



/*

 * In case the rate change propagation to parent clocks is undesirable,

 * this macro allows to specify the clock flags manually.

 */

#define MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width,	\

			_gate, _flags)					\

		MUX_GATE_FLAGS_2(_id, _name, _parents, _reg,		\

					_shift, _width, _gate, _flags, 0)



/*

 * Unless necessary, all MUX_GATE clocks propagate rate changes to their

 * parent clock by default.

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