Commit b024043b authored by Kukjin Kim's avatar Kukjin Kim Committed by Russell King
Browse files

ARM: 7245/1: S3C64XX: introduce arch/arm/mach-s3c64xx/common.[ch] 



This patch introduces common.[ch] which are used only in the
arch/arm/mach-s3c64xx/ directory. The common.c file merges
the cpu.c, irq.c and irq-eint.c which are used commonly on
S3C64XX SoCs and the common.h file replaces with plat/s3c6400.h
and plat/s3c6410.h files.

Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 61b38753

arch/arm/mach-s3c64xx/Makefile

+30 −35
Original line number Diff line number Diff line
@@ -10,54 +10,49 @@ obj-m := 
obj-n				:=

obj-				:=



# Core files

obj-y				+= cpu.o

obj-y				+= clock.o

# Core



# Core support for S3C6400 system

obj-y				+= common.o clock.o



# Core support



obj-$(CONFIG_CPU_S3C6400)	+= s3c6400.o

obj-$(CONFIG_CPU_S3C6410)	+= s3c6410.o



obj-y				+= irq.o

obj-y				+= irq-eint.o

# PM



obj-$(CONFIG_PM)		+= pm.o irq-pm.o sleep.o



# DMA support



obj-$(CONFIG_S3C64XX_DMA)	+= dma.o



# Device support



obj-y				+= dev-uart.o

obj-y				+= dev-audio.o

obj-$(CONFIG_S3C64XX_DEV_SPI)	+= dev-spi.o



# Device setup



obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP)	+= setup-fb-24bpp.o

obj-$(CONFIG_S3C64XX_SETUP_I2C0)	+= setup-i2c0.o

obj-$(CONFIG_S3C64XX_SETUP_I2C1)	+= setup-i2c1.o

obj-$(CONFIG_S3C64XX_SETUP_IDE)		+= setup-ide.o

obj-$(CONFIG_S3C64XX_SETUP_KEYPAD)	+= setup-keypad.o

obj-$(CONFIG_S3C64XX_SETUP_SDHCI)	+= setup-sdhci.o

obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o

obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO)	+= setup-sdhci-gpio.o



# PM



obj-$(CONFIG_PM)		+= pm.o

obj-$(CONFIG_PM)		+= sleep.o

obj-$(CONFIG_PM)		+= irq-pm.o



# Machine support



obj-$(CONFIG_MACH_ANW6410)		+= mach-anw6410.o

obj-$(CONFIG_MACH_SMDK6400)	+= mach-smdk6400.o

obj-$(CONFIG_MACH_SMDK6410)	+= mach-smdk6410.o

obj-$(CONFIG_MACH_REAL6410)     += mach-real6410.o

obj-$(CONFIG_MACH_HMT)			+= mach-hmt.o

obj-$(CONFIG_MACH_MINI6410)		+= mach-mini6410.o

obj-$(CONFIG_MACH_NCP)			+= mach-ncp.o

obj-$(CONFIG_MACH_HMT)		+= mach-hmt.o

obj-$(CONFIG_MACH_REAL6410)		+= mach-real6410.o

obj-$(CONFIG_MACH_SMARTQ)		+= mach-smartq.o

obj-$(CONFIG_MACH_SMARTQ5)		+= mach-smartq5.o

obj-$(CONFIG_MACH_SMARTQ7)		+= mach-smartq7.o

obj-$(CONFIG_MACH_SMDK6400)		+= mach-smdk6400.o

obj-$(CONFIG_MACH_SMDK6410)		+= mach-smdk6410.o

obj-$(CONFIG_MACH_WLF_CRAGG_6410)	+= mach-crag6410.o mach-crag6410-module.o
 


# device support



obj-y				+= dev-uart.o

obj-y				+= dev-audio.o

obj-$(CONFIG_S3C64XX_DEV_SPI)	+= dev-spi.o

arch/arm/mach-s3c64xx/clock.c

+2 −2
Original line number Diff line number Diff line
@@ -705,7 +705,7 @@ static struct clksrc_clk *init_parents[] = { 


#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)



void __init_or_cpufreq s3c6400_setup_clocks(void)

void __init_or_cpufreq s3c64xx_setup_clocks(void)

{

	struct clk *xtal_clk;

	unsigned long xtal;
@@ -804,7 +804,7 @@ static struct clk *clks[] __initdata = { 
 * as ARMCLK as well as the necessary parent clocks.

 *

 * This call does not setup the clocks, which is left to the

 * s3c6400_setup_clocks() call which may be needed by the cpufreq

 * s3c64xx_setup_clocks() call which may be needed by the cpufreq

 * or resume code to re-set the clocks if the bootloader has changed

 * them.

 */

arch/arm/mach-s3c64xx/irq-eint.c→arch/arm/mach-s3c64xx/common.c

+172 −10
Original line number Diff line number Diff line 
/* arch/arm/plat-s3c64xx/irq-eint.c

/*

 * Copyright (c) 2011 Samsung Electronics Co., Ltd.

 *		http://www.samsung.com

 *

 * Copyright 2008 Openmoko, Inc.

 * Copyright 2008 Simtec Electronics

 *	Ben Dooks <ben@simtec.co.uk>

 *	http://armlinux.simtec.co.uk/

 *

 * S3C64XX - Interrupt handling for IRQ_EINT(x)

 * Common Codes for S3C64XX machines

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as
@@ -13,21 +15,182 @@ 
 */



#include <linux/kernel.h>

#include <linux/init.h>

#include <linux/module.h>

#include <linux/interrupt.h>

#include <linux/ioport.h>

#include <linux/sysdev.h>

#include <linux/gpio.h>

#include <linux/irq.h>

#include <linux/serial_core.h>

#include <linux/platform_device.h>

#include <linux/io.h>

#include <linux/dma-mapping.h>

#include <linux/irq.h>

#include <linux/gpio.h>



#include <asm/mach/arch.h>

#include <asm/mach/map.h>

#include <asm/hardware/vic.h>



#include <plat/regs-irqtype.h>

#include <mach/map.h>

#include <mach/hardware.h>

#include <mach/regs-gpio.h>

#include <plat/gpio-cfg.h>



#include <mach/map.h>

#include <plat/cpu.h>

#include <plat/clock.h>

#include <plat/devs.h>

#include <plat/pm.h>

#include <plat/gpio-cfg.h>

#include <plat/irq-uart.h>

#include <plat/irq-vic-timer.h>

#include <plat/regs-irqtype.h>

#include <plat/regs-serial.h>



#include "common.h"



/* uart registration process */



void __init s3c64xx_init_uarts(struct s3c2410_uartcfg *cfg, int no)

{

	s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no);

}



/* table of supported CPUs */



static const char name_s3c6400[] = "S3C6400";

static const char name_s3c6410[] = "S3C6410";



static struct cpu_table cpu_ids[] __initdata = {

	{

		.idcode		= S3C6400_CPU_ID,

		.idmask		= S3C64XX_CPU_MASK,

		.map_io		= s3c6400_map_io,

		.init_clocks	= s3c6400_init_clocks,

		.init_uarts	= s3c64xx_init_uarts,

		.init		= s3c6400_init,

		.name		= name_s3c6400,

	}, {

		.idcode		= S3C6410_CPU_ID,

		.idmask		= S3C64XX_CPU_MASK,

		.map_io		= s3c6410_map_io,

		.init_clocks	= s3c6410_init_clocks,

		.init_uarts	= s3c64xx_init_uarts,

		.init		= s3c6410_init,

		.name		= name_s3c6410,

	},

};



/* minimal IO mapping */



/* see notes on uart map in arch/arm/mach-s3c64xx/include/mach/debug-macro.S */

#define UART_OFFS (S3C_PA_UART & 0xfffff)



static struct map_desc s3c_iodesc[] __initdata = {

	{

		.virtual	= (unsigned long)S3C_VA_SYS,

		.pfn		= __phys_to_pfn(S3C64XX_PA_SYSCON),

		.length		= SZ_4K,

		.type		= MT_DEVICE,

	}, {

		.virtual	= (unsigned long)S3C_VA_MEM,

		.pfn		= __phys_to_pfn(S3C64XX_PA_SROM),

		.length		= SZ_4K,

		.type		= MT_DEVICE,

	}, {

		.virtual	= (unsigned long)(S3C_VA_UART + UART_OFFS),

		.pfn		= __phys_to_pfn(S3C_PA_UART),

		.length		= SZ_4K,

		.type		= MT_DEVICE,

	}, {

		.virtual	= (unsigned long)VA_VIC0,

		.pfn		= __phys_to_pfn(S3C64XX_PA_VIC0),

		.length		= SZ_16K,

		.type		= MT_DEVICE,

	}, {

		.virtual	= (unsigned long)VA_VIC1,

		.pfn		= __phys_to_pfn(S3C64XX_PA_VIC1),

		.length		= SZ_16K,

		.type		= MT_DEVICE,

	}, {

		.virtual	= (unsigned long)S3C_VA_TIMER,

		.pfn		= __phys_to_pfn(S3C_PA_TIMER),

		.length		= SZ_16K,

		.type		= MT_DEVICE,

	}, {

		.virtual	= (unsigned long)S3C64XX_VA_GPIO,

		.pfn		= __phys_to_pfn(S3C64XX_PA_GPIO),

		.length		= SZ_4K,

		.type		= MT_DEVICE,

	}, {

		.virtual	= (unsigned long)S3C64XX_VA_MODEM,

		.pfn		= __phys_to_pfn(S3C64XX_PA_MODEM),

		.length		= SZ_4K,

		.type		= MT_DEVICE,

	}, {

		.virtual	= (unsigned long)S3C_VA_WATCHDOG,

		.pfn		= __phys_to_pfn(S3C64XX_PA_WATCHDOG),

		.length		= SZ_4K,

		.type		= MT_DEVICE,

	}, {

		.virtual	= (unsigned long)S3C_VA_USB_HSPHY,

		.pfn		= __phys_to_pfn(S3C64XX_PA_USB_HSPHY),

		.length		= SZ_1K,

		.type		= MT_DEVICE,

	},

};



struct sysdev_class s3c64xx_sysclass = {

	.name	= "s3c64xx-core",

};



static struct sys_device s3c64xx_sysdev = {

	.cls	= &s3c64xx_sysclass,

};



/* read cpu identification code */



void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)

{

	/* initialise the io descriptors we need for initialisation */

	iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));

	iotable_init(mach_desc, size);

	init_consistent_dma_size(SZ_8M);



	/* detect cpu id */

	s3c64xx_init_cpu();



	s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));

}



static __init int s3c64xx_sysdev_init(void)

{

	sysdev_class_register(&s3c64xx_sysclass);

	return sysdev_register(&s3c64xx_sysdev);

}

core_initcall(s3c64xx_sysdev_init);



/*

 * setup the sources the vic should advertise resume

 * for, even though it is not doing the wake

 * (set_irq_wake needs to be valid)

 */

#define IRQ_VIC0_RESUME (1 << (IRQ_RTC_TIC - IRQ_VIC0_BASE))

#define IRQ_VIC1_RESUME (1 << (IRQ_RTC_ALARM - IRQ_VIC1_BASE) |	\

			 1 << (IRQ_PENDN - IRQ_VIC1_BASE) |	\

			 1 << (IRQ_HSMMC0 - IRQ_VIC1_BASE) |	\

			 1 << (IRQ_HSMMC1 - IRQ_VIC1_BASE) |	\

			 1 << (IRQ_HSMMC2 - IRQ_VIC1_BASE))



void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)

{

	printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);



	/* initialise the pair of VICs */

	vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME);

	vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME);



	/* add the timer sub-irqs */

	s3c_init_vic_timer_irq(5, IRQ_TIMER0);

}



#define eint_offset(irq)	((irq) - IRQ_EINT(0))

#define eint_irq_to_bit(irq)	((u32)(1 << eint_offset(irq)))
@@ -209,5 +372,4 @@ static int __init s3c64xx_init_irq_eint(void) 


	return 0;

}



arch_initcall(s3c64xx_init_irq_eint);

arch/arm/plat-samsung/include/plat/s3c6400.h→arch/arm/mach-s3c64xx/common.h

+55 −0
Original line number Diff line number Diff line 
/* linux/arch/arm/plat-samsung/include/plat/s3c6400.h

/*

 * Copyright (c) 2011 Samsung Electronics Co., Ltd.

 *		http://www.samsung.com

 *

 * Copyright 2008 Openmoko, Inc.

 * Copyright 2008 Simtec Electronics

 *	Ben Dooks <ben@simtec.co.uk>

 *	http://armlinux.simtec.co.uk/

 *

 * Header file for s3c6400 cpu support

 * Common Header for S3C64XX machines

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */



/* Common init code for S3C6400 related SoCs */

#ifndef __ARCH_ARM_MACH_S3C64XX_COMMON_H

#define __ARCH_ARM_MACH_S3C64XX_COMMON_H



extern void s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);

extern void s3c6400_setup_clocks(void);

void s3c64xx_init_irq(u32 vic0, u32 vic1);

void s3c64xx_init_io(struct map_desc *mach_desc, int size);



extern void s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_limit);

void s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_limit);

void s3c64xx_setup_clocks(void);



extern struct syscore_ops s3c64xx_irq_syscore_ops;

extern struct sysdev_class s3c64xx_sysclass;



#ifdef CONFIG_CPU_S3C6400
@@ -26,11 +33,23 @@ extern void s3c6400_init_irq(void); 
extern void s3c6400_map_io(void);

extern void s3c6400_init_clocks(int xtal);



#define s3c6400_init_uarts s3c6400_common_init_uarts



#else

#define s3c6400_init_clocks NULL

#define s3c6400_init_uarts NULL

#define s3c6400_map_io NULL

#define s3c6400_init NULL

#endif



#ifdef CONFIG_CPU_S3C6410



extern  int s3c6410_init(void);

extern void s3c6410_init_irq(void);

extern void s3c6410_map_io(void);

extern void s3c6410_init_clocks(int xtal);



#else

#define s3c6410_init_clocks NULL

#define s3c6410_map_io NULL

#define s3c6410_init NULL

#endif



#endif /* __ARCH_ARM_MACH_S3C64XX_COMMON_H */

arch/arm/mach-s3c64xx/cpu.c

deleted100644 → 0
+0 −161
Original line number Diff line number Diff line 
/* linux/arch/arm/plat-s3c64xx/cpu.c

 *

 * Copyright 2008 Openmoko, Inc.

 * Copyright 2008 Simtec Electronics

 *	Ben Dooks <ben@simtec.co.uk>

 *	http://armlinux.simtec.co.uk/

 *

 * S3C64XX CPU Support

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

*/



#include <linux/init.h>

#include <linux/module.h>

#include <linux/interrupt.h>

#include <linux/ioport.h>

#include <linux/sysdev.h>

#include <linux/serial_core.h>

#include <linux/platform_device.h>

#include <linux/io.h>

#include <linux/dma-mapping.h>



#include <mach/hardware.h>

#include <mach/map.h>



#include <asm/mach/arch.h>

#include <asm/mach/map.h>



#include <plat/regs-serial.h>



#include <plat/cpu.h>

#include <plat/devs.h>

#include <plat/clock.h>



#include <plat/s3c6400.h>

#include <plat/s3c6410.h>



/* table of supported CPUs */



static const char name_s3c6400[] = "S3C6400";

static const char name_s3c6410[] = "S3C6410";



static struct cpu_table cpu_ids[] __initdata = {

	{

		.idcode		= S3C6400_CPU_ID,

		.idmask		= S3C64XX_CPU_MASK,

		.map_io		= s3c6400_map_io,

		.init_clocks	= s3c6400_init_clocks,

		.init_uarts	= s3c6400_init_uarts,

		.init		= s3c6400_init,

		.name		= name_s3c6400,

	}, {

		.idcode		= S3C6410_CPU_ID,

		.idmask		= S3C64XX_CPU_MASK,

		.map_io		= s3c6410_map_io,

		.init_clocks	= s3c6410_init_clocks,

		.init_uarts	= s3c6410_init_uarts,

		.init		= s3c6410_init,

		.name		= name_s3c6410,

	},

};



/* minimal IO mapping */



/* see notes on uart map in arch/arm/mach-s3c6400/include/mach/debug-macro.S */

#define UART_OFFS (S3C_PA_UART & 0xfffff)



static struct map_desc s3c_iodesc[] __initdata = {

	{

		.virtual	= (unsigned long)S3C_VA_SYS,

		.pfn		= __phys_to_pfn(S3C64XX_PA_SYSCON),

		.length		= SZ_4K,

		.type		= MT_DEVICE,

	}, {

		.virtual	= (unsigned long)S3C_VA_MEM,

		.pfn		= __phys_to_pfn(S3C64XX_PA_SROM),

		.length		= SZ_4K,

		.type		= MT_DEVICE,

	}, {

		.virtual	= (unsigned long)(S3C_VA_UART + UART_OFFS),

		.pfn		= __phys_to_pfn(S3C_PA_UART),

		.length		= SZ_4K,

		.type		= MT_DEVICE,

	}, {

		.virtual	= (unsigned long)VA_VIC0,

		.pfn		= __phys_to_pfn(S3C64XX_PA_VIC0),

		.length		= SZ_16K,

		.type		= MT_DEVICE,

	}, {

		.virtual	= (unsigned long)VA_VIC1,

		.pfn		= __phys_to_pfn(S3C64XX_PA_VIC1),

		.length		= SZ_16K,

		.type		= MT_DEVICE,

	}, {

		.virtual	= (unsigned long)S3C_VA_TIMER,

		.pfn		= __phys_to_pfn(S3C_PA_TIMER),

		.length		= SZ_16K,

		.type		= MT_DEVICE,

	}, {

		.virtual	= (unsigned long)S3C64XX_VA_GPIO,

		.pfn		= __phys_to_pfn(S3C64XX_PA_GPIO),

		.length		= SZ_4K,

		.type		= MT_DEVICE,

	}, {

		.virtual	= (unsigned long)S3C64XX_VA_MODEM,

		.pfn		= __phys_to_pfn(S3C64XX_PA_MODEM),

		.length		= SZ_4K,

		.type		= MT_DEVICE,

	}, {

		.virtual	= (unsigned long)S3C_VA_WATCHDOG,

		.pfn		= __phys_to_pfn(S3C64XX_PA_WATCHDOG),

		.length		= SZ_4K,

		.type		= MT_DEVICE,

	}, {

		.virtual	= (unsigned long)S3C_VA_USB_HSPHY,

		.pfn		= __phys_to_pfn(S3C64XX_PA_USB_HSPHY),

		.length		= SZ_1K,

		.type		= MT_DEVICE,

	},

};





struct sysdev_class s3c64xx_sysclass = {

	.name	= "s3c64xx-core",

};



static struct sys_device s3c64xx_sysdev = {

	.cls	= &s3c64xx_sysclass,

};



/* uart registration process */



void __init s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)

{

	s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no);

}



/* read cpu identification code */



void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)

{

	/* initialise the io descriptors we need for initialisation */

	iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));

	iotable_init(mach_desc, size);

	init_consistent_dma_size(SZ_8M);



	/* detect cpu id */

	s3c64xx_init_cpu();



	s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));

}



static __init int s3c64xx_sysdev_init(void)

{

	sysdev_class_register(&s3c64xx_sysclass);

	return sysdev_register(&s3c64xx_sysdev);

}



core_initcall(s3c64xx_sysdev_init);

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