Commit b01a3ef3 authored Sep 18, 2019 by Matt Roper

drm/i915: Future-proof DDC pin mapping

We generally assume future platforms will inherit the behavior of the
most recent platforms, so update our DDC pin mapping defaults to match
how ICP/TGP behave (i.e., pins starting from GMBUS_PIN_1_BXT for combo
PHY's and pins starting from GMBUS_PIN_9_TC1_ICP for TC PHY's). MCC's
non-standard handling of combo PHY C seems like a platform-specific
quirk that is unlikely to be duplicated on future platforms, so continue
handling it as a special case.

Without this change, future platforms would default to gen4-style pin
mapping which is almost certainly not what we'll want.

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190918235626.3750-1-matthew.d.roper@intel.com

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

parent a47e788c

drivers/gpu/drm/i915/display/intel_hdmi.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -3028,7 +3028,7 @@ static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv,

		if (HAS_PCH_MCC(dev_priv))
		ddc_pin = mcc_port_to_ddc_pin(dev_priv, port);
		else if (HAS_PCH_TGP(dev_priv) \|\| HAS_PCH_ICP(dev_priv))
		else if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP)
		ddc_pin = icl_port_to_ddc_pin(dev_priv, port);
		else if (HAS_PCH_CNP(dev_priv))
		ddc_pin = cnp_port_to_ddc_pin(dev_priv, port);

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