Merge tag 'for-linus-20160801' of git://git.infradead.org/linux-mtd

			0 maps to GPMC_WAIT0 pin.

 - gpio-cells:		Must be set to 2

Required properties when using NAND prefetch dma:

 - dmas			GPMC NAND prefetch dma channel

 - dma-names		Must be set to "rxtx"

Timing properties for child nodes. All are optional and default to 0.

 - gpmc,sync-clk-ps:	Minimum clock period for synchronous mode, in picoseconds

		ti,hwmods = "gpmc";

		reg = <0x50000000 0x2000>;

		interrupts = <100>;

		dmas = <&edma 52 0>;

		dma-names = "rxtx";

		gpmc,num-cs = <8>;

		gpmc,num-waitpins = <2>;

		#address-cells = <2>;

* Atmel Quad Serial Peripheral Interface (QSPI)

Required properties:

- compatible:     Should be "atmel,sama5d2-qspi".

- reg:            Should contain the locations and lengths of the base registers

                  and the mapped memory.

- reg-names:      Should contain the resource reg names:

                  - qspi_base: configuration register address space

                  - qspi_mmap: memory mapped address space

- interrupts:     Should contain the interrupt for the device.

- clocks:         The phandle of the clock needed by the QSPI controller.

- #address-cells: Should be <1>.

- #size-cells:    Should be <0>.

Example:

spi@f0020000 {

	compatible = "atmel,sama5d2-qspi";

	reg = <0xf0020000 0x100>, <0xd0000000 0x8000000>;

	reg-names = "qspi_base", "qspi_mmap";

	interrupts = <52 IRQ_TYPE_LEVEL_HIGH 7>;

	clocks = <&spi0_clk>;

	#address-cells = <1>;

	#size-cells = <0>;

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_spi0_default>;

	status = "okay";

	m25p80@0 {

		...

	};

};

                         brcm,brcmnand-v6.2

                         brcm,brcmnand-v7.0

                         brcm,brcmnand-v7.1

                         brcm,brcmnand-v7.2

                         brcm,brcmnand

- reg              : the register start and length for NAND register region.

                     (optional) Flash DMA register range (if present)

* Cadence Quad SPI controller

Required properties:

- compatible : Should be "cdns,qspi-nor".

- reg : Contains two entries, each of which is a tuple consisting of a

	physical address and length. The first entry is the address and

	length of the controller register set. The second entry is the

	address and length of the QSPI Controller data area.

- interrupts : Unit interrupt specifier for the controller interrupt.

- clocks : phandle to the Quad SPI clock.

- cdns,fifo-depth : Size of the data FIFO in words.

- cdns,fifo-width : Bus width of the data FIFO in bytes.

- cdns,trigger-address : 32-bit indirect AHB trigger address.

Optional properties:

- cdns,is-decoded-cs : Flag to indicate whether decoder is used or not.

Optional subnodes:

Subnodes of the Cadence Quad SPI controller are spi slave nodes with additional

custom properties:

- cdns,read-delay : Delay for read capture logic, in clock cycles

- cdns,tshsl-ns : Delay in nanoseconds for the length that the master

                  mode chip select outputs are de-asserted between

		  transactions.

- cdns,tsd2d-ns : Delay in nanoseconds between one chip select being

                  de-activated and the activation of another.

- cdns,tchsh-ns : Delay in nanoseconds between last bit of current

                  transaction and deasserting the device chip select

		  (qspi_n_ss_out).

- cdns,tslch-ns : Delay in nanoseconds between setting qspi_n_ss_out low

                  and first bit transfer.

Example:

	qspi: spi@ff705000 {

		compatible = "cdns,qspi-nor";

		#address-cells = <1>;

		#size-cells = <0>;

		reg = <0xff705000 0x1000>,

		      <0xffa00000 0x1000>;

		interrupts = <0 151 4>;

		clocks = <&qspi_clk>;

		cdns,is-decoded-cs;

		cdns,fifo-depth = <128>;

		cdns,fifo-width = <4>;

		cdns,trigger-address = <0x00000000>;

		flash0: n25q00@0 {

			...

			cdns,read-delay = <4>;

			cdns,tshsl-ns = <50>;

			cdns,tsd2d-ns = <50>;

			cdns,tchsh-ns = <4>;

			cdns,tslch-ns = <4>;

		};

	};

		"prefetch-polled"	Prefetch polled mode (default)

		"polled"		Polled mode, without prefetch

		"prefetch-dma"		Prefetch enabled sDMA mode

		"prefetch-dma"		Prefetch enabled DMA mode

		"prefetch-irq"		Prefetch enabled irq mode

 - elm_id:	<deprecated> use "ti,elm-id" instead