Unverified Commit aff77833 authored Feb 04, 2020 by Zong Li Committed by Palmer Dabbelt Mar 03, 2020

riscv: force hart_lottery to put in .sdata section



In PIC code model, the zero initialized data always be put in .bss
section, so when building kernel as PIE, the hart_lottery won't present
in small data section, and it causes more than one harts to get the
lottery, because the main hart clears the content of .bss section
immediately after it getting the lottery.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
[Palmer: added a comment]
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>

parent 2fab7a15

arch/riscv/kernel/setup.c

+6 −2

Original line number	Diff line number	Diff line
		@@ -39,8 +39,12 @@ struct screen_info screen_info = {
		};
		#endif

		/* The lucky hart to first increment this variable will boot the other cores */
		atomic_t hart_lottery;
		/*
		* The lucky hart to first increment this variable will boot the other cores.
		* This is used before the kernel initializes the BSS so it can't be in the
		* BSS.
		*/
		atomic_t hart_lottery __section(.sdata);
		unsigned long boot_cpu_hartid;

		void __init parse_dtb(void)

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