mtd: spi-nor: core: Allow flashes to specify MTD writesize (afd473e8) · Commits · 戴 / test

Some flashes like the Cypress S28 family use ECC. Under this ECC scheme, multi-pass writes to an ECC block is not allowed. In other words, once data is programmed to an ECC block, it can't be programmed again without erasing it first. Upper layers like file systems need to be given this information so they do not cause error conditions on the flash by attempting multi-pass programming. This can be done by setting 'writesize' in 'struct mtd_info'. Set the default to 1 but allow flashes to modify it in fixup hooks. If more flashes show up with this constraint in the future it might be worth it to add it to 'struct flash_info', but for now increasing its size is not worth it. Signed-off-by:

Pratyush Yadav <p.yadav@ti.com> Signed-off-by:

Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by:

Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20201201102711.8727-3-p.yadav@ti.com

drivers/mtd/spi-nor/core.c

+2 −1

Original line number	Diff line number	Diff line
		@@ -2885,6 +2885,7 @@ static void spi_nor_info_init_params(struct spi_nor *nor)
		nor->flags \|= SNOR_F_HAS_16BIT_SR;

		/* Set SPI NOR sizes. */
		params->writesize = 1;
		params->size = (u64)info->sector_size * info->n_sectors;
		params->page_size = info->page_size;

		@@ -3430,7 +3431,7 @@ int spi_nor_scan(struct spi_nor nor, const char name,
		mtd->name = dev_name(dev);
		mtd->priv = nor;
		mtd->type = MTD_NORFLASH;
		mtd->writesize = 1;
		mtd->writesize = nor->params->writesize;
		mtd->flags = MTD_CAP_NORFLASH;
		mtd->size = nor->params->size;
		mtd->_erase = spi_nor_erase;

drivers/mtd/spi-nor/core.h

+3 −0

Original line number	Diff line number	Diff line
		@@ -193,6 +193,8 @@ struct spi_nor_locking_ops {
		* Serial Flash Discoverable Parameters (SFDP) tables.
		*
		* @size: the flash memory density in bytes.
		* @writesize Minimal writable flash unit size. Defaults to 1. Set to
		* ECC unit size for ECC-ed flashes.
		* @page_size: the page size of the SPI NOR flash memory.
		* @rdsr_dummy: dummy cycles needed for Read Status Register command.
		* @rdsr_addr_nbytes: dummy address bytes needed for Read Status Register
		@@ -219,6 +221,7 @@ struct spi_nor_locking_ops {
		*/
		struct spi_nor_flash_parameter {
		u64 size;
		u32 writesize;
		u32 page_size;
		u8 rdsr_dummy;
		u8 rdsr_addr_nbytes;

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