Commit afcf93e9 authored by Michael Walle's avatar Michael Walle Committed by Vignesh Raghavendra
Browse files

mtd: spi-nor: intel: remove global protection flag



For the Atmel and SST parts this flag was already moved to individual
flash parts because it is considered bad esp. because newer flash chips
will automatically inherit the "has locking" support. While this won't
likely be the case for the Intel parts, we do it for consistency
reasons.

Signed-off-by: default avatarMichael Walle <michael@walle.cc>
Signed-off-by: default avatarVignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: default avatarTudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20201203162959.29589-6-michael@walle.cc
parent a8333837
Loading
Loading
Loading
Loading
+3 −13
Original line number Diff line number Diff line
@@ -10,23 +10,13 @@

static const struct flash_info intel_parts[] = {
	/* Intel/Numonyx -- xxxs33b */
	{ "160s33b",  INFO(0x898911, 0, 64 * 1024,  32, 0) },
	{ "320s33b",  INFO(0x898912, 0, 64 * 1024,  64, 0) },
	{ "640s33b",  INFO(0x898913, 0, 64 * 1024, 128, 0) },
};

static void intel_default_init(struct spi_nor *nor)
{
	nor->flags |= SNOR_F_HAS_LOCK;
}

static const struct spi_nor_fixups intel_fixups = {
	.default_init = intel_default_init,
	{ "160s33b",  INFO(0x898911, 0, 64 * 1024,  32, SPI_NOR_HAS_LOCK) },
	{ "320s33b",  INFO(0x898912, 0, 64 * 1024,  64, SPI_NOR_HAS_LOCK) },
	{ "640s33b",  INFO(0x898913, 0, 64 * 1024, 128, SPI_NOR_HAS_LOCK) },
};

const struct spi_nor_manufacturer spi_nor_intel = {
	.name = "intel",
	.parts = intel_parts,
	.nparts = ARRAY_SIZE(intel_parts),
	.fixups = &intel_fixups,
};