powerpc/mm: Fix encoding of page table cache numbers (af984b81) · Commits · 戴 / test

The mask used to encode the page table cache number in the batch when freeing page tables was too small for the new possible values of MMU page sizes. This increases it along with a comment explaining the constraints. Signed-off-by:

Benjamin Herrenschmidt <benh@kernel.crashing.org>

arch/powerpc/include/asm/pgalloc.h

+6 −1

Original line number	Diff line number	Diff line
		@@ -28,7 +28,12 @@ typedef struct pgtable_free {
		unsigned long val;
		} pgtable_free_t;

		#define PGF_CACHENUM_MASK 0x7
		/* This needs to be big enough to allow for MMU_PAGE_COUNT + 2 to be stored
		* and small enough to fit in the low bits of any naturally aligned page
		* table cache entry. Arbitrarily set to 0x1f, that should give us some
		* room to grow
		*/
		#define PGF_CACHENUM_MASK 0x1f

		static inline pgtable_free_t pgtable_free_cache(void *p, int cachenum,
		unsigned long mask)

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