Commit af93096e authored by Briana Oursler's avatar Briana Oursler Committed by Greg Kroah-Hartman
Browse files

Staging: vt6655: Replace camel case variable names. 



Replace camel case variable names with snake case in baseband.h and its
dependencies.

Signed-off-by: default avatarBriana Oursler <briana.oursler@gmail.com>
Reviewed-by: default avatarStefano Brivio <sbrivio@redhat.com>
Link: https://lore.kernel.org/r/20200403171805.466600-1-briana.oursler@gmail.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 3ea1cb24

drivers/staging/vt6655/baseband.c

+156 −156
Original line number Diff line number Diff line
@@ -12,10 +12,10 @@ 
 * Date: Aug.22, 2002

 *

 * Functions:

 *      BBuGetFrameTime        - Calculate data frame transmitting time

 *      BBbReadEmbedded         - Embedded read baseband register via MAC

 *      BBbWriteEmbedded        - Embedded write baseband register via MAC

 *      BBbVT3253Init          - VIA VT3253 baseband chip init code

 *      bb_get_frame_time	 - Calculate data frame transmitting time

 *      bb_read_embedded	 - Embedded read baseband register via MAC

 *      bb_write_embedded	 - Embedded write baseband register via MAC

 *      bb_vt3253_init		 - VIA VT3253 baseband chip init code

 *

 * Revision History:

 *      06-10-2003 Bryan YC Fan:  Re-write codes to support VT3253 spec.
@@ -1693,53 +1693,53 @@ static const unsigned short awcFrameTime[MAX_RATE] = { 
 *

 * Parameters:

 *  In:

 *      byPreambleType  - Preamble Type

 *      byPktType        - PK_TYPE_11A, PK_TYPE_11B, PK_TYPE_11GB, PK_TYPE_11GA

 *      cbFrameLength   - Baseband Type

 *      wRate           - Tx Rate

 *      by_preamble_type  - Preamble Type

 *      by_pkt_type        - PK_TYPE_11A, PK_TYPE_11B, PK_TYPE_11GB, PK_TYPE_11GA

 *      cb_frame_length   - Baseband Type

 *      tx_rate           - Tx Rate

 *  Out:

 *

 * Return Value: FrameTime

 *

 */

unsigned int BBuGetFrameTime(unsigned char byPreambleType,

			     unsigned char byPktType,

			     unsigned int cbFrameLength, unsigned short wRate)

unsigned int bb_get_frame_time(unsigned char by_preamble_type,

			       unsigned char by_pkt_type,

			       unsigned int cb_frame_length,

			       unsigned short tx_rate)

{

	unsigned int uFrameTime;

	unsigned int uPreamble;

	unsigned int uTmp;

	unsigned int uRateIdx = (unsigned int)wRate;

	unsigned int uRate = 0;

	unsigned int frame_time;

	unsigned int preamble;

	unsigned int tmp;

	unsigned int rate_idx = (unsigned int)tx_rate;

	unsigned int rate = 0;



	if (uRateIdx > RATE_54M)

	if (rate_idx > RATE_54M)

		return 0;



	uRate = (unsigned int)awcFrameTime[uRateIdx];

	rate = (unsigned int)awcFrameTime[rate_idx];



	if (uRateIdx <= 3) {          /* CCK mode */

		if (byPreambleType == 1) /* Short */

			uPreamble = 96;

	if (rate_idx <= 3) {		    /* CCK mode */

		if (by_preamble_type == 1) /* Short */

			preamble = 96;

		else

			uPreamble = 192;



		uFrameTime = (cbFrameLength * 80) / uRate;  /* ????? */

		uTmp = (uFrameTime * uRate) / 80;

		if (cbFrameLength != uTmp)

			uFrameTime++;

			preamble = 192;

		frame_time = (cb_frame_length * 80) / rate;  /* ????? */

		tmp = (frame_time * rate) / 80;

		if (cb_frame_length != tmp)

			frame_time++;



		return uPreamble + uFrameTime;

		return preamble + frame_time;

	}

	uFrameTime = (cbFrameLength * 8 + 22) / uRate; /* ???????? */

	uTmp = ((uFrameTime * uRate) - 22) / 8;

	if (cbFrameLength != uTmp)

		uFrameTime++;

	frame_time = (cb_frame_length * 8 + 22) / rate; /* ???????? */

	tmp = ((frame_time * rate) - 22) / 8;

	if (cb_frame_length != tmp)

		frame_time++;



	uFrameTime = uFrameTime * 4;    /* ??????? */

	if (byPktType != PK_TYPE_11A)

		uFrameTime += 6;     /* ?????? */

	frame_time = frame_time * 4;    /* ??????? */

	if (by_pkt_type != PK_TYPE_11A)

		frame_time += 6;     /* ?????? */



	return 20 + uFrameTime; /* ?????? */

	return 20 + frame_time; /* ?????? */

}



/*
@@ -1897,34 +1897,34 @@ void vnt_get_phy_field(struct vnt_private *priv, u32 frame_length, 
 * Parameters:

 *  In:

 *      iobase      - I/O base address

 *      byBBAddr    - address of register in Baseband

 *      by_bb_addr  - address of register in Baseband

 *  Out:

 *      pbyData     - data read

 *      pby_data    - data read

 *

 * Return Value: true if succeeded; false if failed.

 *

 */

bool BBbReadEmbedded(struct vnt_private *priv,

		     unsigned char byBBAddr, unsigned char *pbyData)

bool bb_read_embedded(struct vnt_private *priv, unsigned char by_bb_addr,

		      unsigned char *pby_data)

{

	void __iomem *iobase = priv->PortOffset;

	unsigned short ww;

	unsigned char byValue;

	unsigned char by_value;



	/* BB reg offset */

	VNSvOutPortB(iobase + MAC_REG_BBREGADR, byBBAddr);

	VNSvOutPortB(iobase + MAC_REG_BBREGADR, by_bb_addr);



	/* turn on REGR */

	MACvRegBitsOn(iobase, MAC_REG_BBREGCTL, BBREGCTL_REGR);

	/* W_MAX_TIMEOUT is the timeout period */

	for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {

		VNSvInPortB(iobase + MAC_REG_BBREGCTL, &byValue);

		if (byValue & BBREGCTL_DONE)

		VNSvInPortB(iobase + MAC_REG_BBREGCTL, &by_value);

		if (by_value & BBREGCTL_DONE)

			break;

	}



	/* get BB data */

	VNSvInPortB(iobase + MAC_REG_BBREGDATA, pbyData);

	VNSvInPortB(iobase + MAC_REG_BBREGDATA, pby_data);



	if (ww == W_MAX_TIMEOUT) {

		pr_debug(" DBG_PORT80(0x30)\n");
@@ -1939,32 +1939,32 @@ bool BBbReadEmbedded(struct vnt_private *priv, 
 * Parameters:

 *  In:

 *      iobase      - I/O base address

 *      byBBAddr    - address of register in Baseband

 *      byData      - data to write

 *      by_bb_addr  - address of register in Baseband

 *      by_data     - data to write

 *  Out:

 *      none

 *

 * Return Value: true if succeeded; false if failed.

 *

 */

bool BBbWriteEmbedded(struct vnt_private *priv,

		      unsigned char byBBAddr, unsigned char byData)

bool bb_write_embedded(struct vnt_private *priv, unsigned char by_bb_addr,

		       unsigned char by_data)

{

	void __iomem *iobase = priv->PortOffset;

	unsigned short ww;

	unsigned char byValue;

	unsigned char by_value;



	/* BB reg offset */

	VNSvOutPortB(iobase + MAC_REG_BBREGADR, byBBAddr);

	VNSvOutPortB(iobase + MAC_REG_BBREGADR, by_bb_addr);

	/* set BB data */

	VNSvOutPortB(iobase + MAC_REG_BBREGDATA, byData);

	VNSvOutPortB(iobase + MAC_REG_BBREGDATA, by_data);



	/* turn on BBREGCTL_REGW */

	MACvRegBitsOn(iobase, MAC_REG_BBREGCTL, BBREGCTL_REGW);

	/* W_MAX_TIMEOUT is the timeout period */

	for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {

		VNSvInPortB(iobase + MAC_REG_BBREGCTL, &byValue);

		if (byValue & BBREGCTL_DONE)

		VNSvInPortB(iobase + MAC_REG_BBREGCTL, &by_value);

		if (by_value & BBREGCTL_DONE)

			break;

	}
@@ -1990,29 +1990,29 @@ bool BBbWriteEmbedded(struct vnt_private *priv, 
 *

 */



bool BBbVT3253Init(struct vnt_private *priv)

bool bb_vt3253_init(struct vnt_private *priv)

{

	bool bResult = true;

	bool result = true;

	int        ii;

	void __iomem *iobase = priv->PortOffset;

	unsigned char byRFType = priv->byRFType;

	unsigned char byLocalID = priv->byLocalID;

	unsigned char by_rf_type = priv->byRFType;

	unsigned char by_local_id = priv->byLocalID;



	if (byRFType == RF_RFMD2959) {

		if (byLocalID <= REV_ID_VT3253_A1) {

	if (by_rf_type == RF_RFMD2959) {

		if (by_local_id <= REV_ID_VT3253_A1) {

			for (ii = 0; ii < CB_VT3253_INIT_FOR_RFMD; ii++)

				bResult &= BBbWriteEmbedded(priv,

				result &= bb_write_embedded(priv,

					byVT3253InitTab_RFMD[ii][0],

					byVT3253InitTab_RFMD[ii][1]);



		} else {

			for (ii = 0; ii < CB_VT3253B0_INIT_FOR_RFMD; ii++)

				bResult &= BBbWriteEmbedded(priv,

				result &= bb_write_embedded(priv,

					byVT3253B0_RFMD[ii][0],

					byVT3253B0_RFMD[ii][1]);



			for (ii = 0; ii < CB_VT3253B0_AGC_FOR_RFMD2959; ii++)

				bResult &= BBbWriteEmbedded(priv,

				result &= bb_write_embedded(priv,

					byVT3253B0_AGC4_RFMD2959[ii][0],

					byVT3253B0_AGC4_RFMD2959[ii][1]);
@@ -2027,14 +2027,14 @@ bool BBbVT3253Init(struct vnt_private *priv) 
		priv->ldBmThreshold[1] = -50;

		priv->ldBmThreshold[2] = 0;

		priv->ldBmThreshold[3] = 0;

	} else if ((byRFType == RF_AIROHA) || (byRFType == RF_AL2230S)) {

	} else if ((by_rf_type == RF_AIROHA) || (by_rf_type == RF_AL2230S)) {

		for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++)

			bResult &= BBbWriteEmbedded(priv,

			result &= bb_write_embedded(priv,

				byVT3253B0_AIROHA2230[ii][0],

				byVT3253B0_AIROHA2230[ii][1]);



		for (ii = 0; ii < CB_VT3253B0_AGC; ii++)

			bResult &= BBbWriteEmbedded(priv,

			result &= bb_write_embedded(priv,

				byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);



		priv->abyBBVGA[0] = 0x1C;
@@ -2045,14 +2045,14 @@ bool BBbVT3253Init(struct vnt_private *priv) 
		priv->ldBmThreshold[1] = -48;

		priv->ldBmThreshold[2] = 0;

		priv->ldBmThreshold[3] = 0;

	} else if (byRFType == RF_UW2451) {

	} else if (by_rf_type == RF_UW2451) {

		for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++)

			bResult &= BBbWriteEmbedded(priv,

			result &= bb_write_embedded(priv,

				byVT3253B0_UW2451[ii][0],

				byVT3253B0_UW2451[ii][1]);



		for (ii = 0; ii < CB_VT3253B0_AGC; ii++)

			bResult &= BBbWriteEmbedded(priv,

			result &= bb_write_embedded(priv,

				byVT3253B0_AGC[ii][0],

				byVT3253B0_AGC[ii][1]);
@@ -2067,9 +2067,9 @@ bool BBbVT3253Init(struct vnt_private *priv) 
		priv->ldBmThreshold[1] = -50;

		priv->ldBmThreshold[2] = 0;

		priv->ldBmThreshold[3] = 0;

	} else if (byRFType == RF_UW2452) {

	} else if (by_rf_type == RF_UW2452) {

		for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++)

			bResult &= BBbWriteEmbedded(priv,

			result &= bb_write_embedded(priv,

				byVT3253B0_UW2451[ii][0],

				byVT3253B0_UW2451[ii][1]);
@@ -2078,7 +2078,7 @@ bool BBbVT3253Init(struct vnt_private *priv) 
		 * 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted)

		 */



		/*bResult &= BBbWriteEmbedded(iobase,0x09,0x41);*/

		/*bResult &= bb_write_embedded(iobase,0x09,0x41);*/



		/* Init ANT B select,

		 * RX Config CR10 = 0x28->0x2A,
@@ -2086,23 +2086,23 @@ bool BBbVT3253Init(struct vnt_private *priv) 
		 * make the ANT_A, ANT_B inverted)

		 */



		/*bResult &= BBbWriteEmbedded(iobase,0x0a,0x28);*/

		/*bResult &= bb_write_embedded(iobase,0x0a,0x28);*/

		/* Select VC1/VC2, CR215 = 0x02->0x06 */

		bResult &= BBbWriteEmbedded(priv, 0xd7, 0x06);

		result &= bb_write_embedded(priv, 0xd7, 0x06);



		/* {{RobertYu:20050125, request by Jack */

		bResult &= BBbWriteEmbedded(priv, 0x90, 0x20);

		bResult &= BBbWriteEmbedded(priv, 0x97, 0xeb);

		result &= bb_write_embedded(priv, 0x90, 0x20);

		result &= bb_write_embedded(priv, 0x97, 0xeb);

		/* }} */



		/* {{RobertYu:20050221, request by Jack */

		bResult &= BBbWriteEmbedded(priv, 0xa6, 0x00);

		bResult &= BBbWriteEmbedded(priv, 0xa8, 0x30);

		result &= bb_write_embedded(priv, 0xa6, 0x00);

		result &= bb_write_embedded(priv, 0xa8, 0x30);

		/* }} */

		bResult &= BBbWriteEmbedded(priv, 0xb0, 0x58);

		result &= bb_write_embedded(priv, 0xb0, 0x58);



		for (ii = 0; ii < CB_VT3253B0_AGC; ii++)

			bResult &= BBbWriteEmbedded(priv,

			result &= bb_write_embedded(priv,

				byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);



		priv->abyBBVGA[0] = 0x14;
@@ -2115,14 +2115,14 @@ bool BBbVT3253Init(struct vnt_private *priv) 
		priv->ldBmThreshold[3] = 0;

		/* }} RobertYu */



	} else if (byRFType == RF_VT3226) {

	} else if (by_rf_type == RF_VT3226) {

		for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++)

			bResult &= BBbWriteEmbedded(priv,

			result &= bb_write_embedded(priv,

				byVT3253B0_AIROHA2230[ii][0],

				byVT3253B0_AIROHA2230[ii][1]);



		for (ii = 0; ii < CB_VT3253B0_AGC; ii++)

			bResult &= BBbWriteEmbedded(priv,

			result &= bb_write_embedded(priv,

				byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);



		priv->abyBBVGA[0] = 0x1C;
@@ -2136,9 +2136,9 @@ bool BBbVT3253Init(struct vnt_private *priv) 
		/* Fix VT3226 DFC system timing issue */

		MACvSetRFLE_LatchBase(iobase);

		/* {{ RobertYu: 20050104 */

	} else if (byRFType == RF_AIROHA7230) {

	} else if (by_rf_type == RF_AIROHA7230) {

		for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++)

			bResult &= BBbWriteEmbedded(priv,

			result &= bb_write_embedded(priv,

				byVT3253B0_AIROHA2230[ii][0],

				byVT3253B0_AIROHA2230[ii][1]);
@@ -2146,17 +2146,17 @@ bool BBbVT3253Init(struct vnt_private *priv) 
		/* Init ANT B select,TX Config CR09 = 0x61->0x45,

		 * 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted)

		 */

		/*bResult &= BBbWriteEmbedded(iobase,0x09,0x41);*/

		/* bResult &= bb_write_embedded(iobase,0x09,0x41);*/

		/* Init ANT B select,RX Config CR10 = 0x28->0x2A,

		 * 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted)

		 */

		/* bResult &= BBbWriteEmbedded(iobase,0x0a,0x28);*/

		/* Select VC1/VC2, CR215 = 0x02->0x06 */

		bResult &= BBbWriteEmbedded(priv, 0xd7, 0x06);

		result &= bb_write_embedded(priv, 0xd7, 0x06);

		/* }} */



		for (ii = 0; ii < CB_VT3253B0_AGC; ii++)

			bResult &= BBbWriteEmbedded(priv,

			result &= bb_write_embedded(priv,

				byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);



		priv->abyBBVGA[0] = 0x1C;
@@ -2174,12 +2174,12 @@ bool BBbVT3253Init(struct vnt_private *priv) 
		priv->abyBBVGA[0] = 0x1C;

	}



	if (byLocalID > REV_ID_VT3253_A1) {

		BBbWriteEmbedded(priv, 0x04, 0x7F);

		BBbWriteEmbedded(priv, 0x0D, 0x01);

	if (by_local_id > REV_ID_VT3253_A1) {

		bb_write_embedded(priv, 0x04, 0x7F);

		bb_write_embedded(priv, 0x0D, 0x01);

	}



	return bResult;

	return result;

}



/*
@@ -2195,42 +2195,42 @@ bool BBbVT3253Init(struct vnt_private *priv) 
 *

 */

void

BBvSetShortSlotTime(struct vnt_private *priv)

bb_set_short_slot_time(struct vnt_private *priv)

{

	unsigned char byBBRxConf = 0;

	unsigned char byBBVGA = 0;

	unsigned char by_bb_rx_conf = 0;

	unsigned char by_bb_vga = 0;



	BBbReadEmbedded(priv, 0x0A, &byBBRxConf); /* CR10 */

	bb_read_embedded(priv, 0x0A, &by_bb_rx_conf); /* CR10 */



	if (priv->bShortSlotTime)

		byBBRxConf &= 0xDF; /* 1101 1111 */

		by_bb_rx_conf &= 0xDF; /* 1101 1111 */

	else

		byBBRxConf |= 0x20; /* 0010 0000 */

		by_bb_rx_conf |= 0x20; /* 0010 0000 */



	/* patch for 3253B0 Baseband with Cardbus module */

	BBbReadEmbedded(priv, 0xE7, &byBBVGA);

	if (byBBVGA == priv->abyBBVGA[0])

		byBBRxConf |= 0x20; /* 0010 0000 */

	bb_read_embedded(priv, 0xE7, &by_bb_vga);

	if (by_bb_vga == priv->abyBBVGA[0])

		by_bb_rx_conf |= 0x20; /* 0010 0000 */



	BBbWriteEmbedded(priv, 0x0A, byBBRxConf); /* CR10 */

	bb_write_embedded(priv, 0x0A, by_bb_rx_conf); /* CR10 */

}



void BBvSetVGAGainOffset(struct vnt_private *priv, unsigned char byData)

void bb_set_vga_gain_offset(struct vnt_private *priv, unsigned char by_data)

{

	unsigned char byBBRxConf = 0;

	unsigned char by_bb_rx_conf = 0;



	BBbWriteEmbedded(priv, 0xE7, byData);

	bb_write_embedded(priv, 0xE7, by_data);



	BBbReadEmbedded(priv, 0x0A, &byBBRxConf); /* CR10 */

	bb_read_embedded(priv, 0x0A, &by_bb_rx_conf); /* CR10 */

	/* patch for 3253B0 Baseband with Cardbus module */

	if (byData == priv->abyBBVGA[0])

		byBBRxConf |= 0x20; /* 0010 0000 */

	if (by_data == priv->abyBBVGA[0])

		by_bb_rx_conf |= 0x20; /* 0010 0000 */

	else if (priv->bShortSlotTime)

		byBBRxConf &= 0xDF; /* 1101 1111 */

		by_bb_rx_conf &= 0xDF; /* 1101 1111 */

	else

		byBBRxConf |= 0x20; /* 0010 0000 */

	priv->byBBVGACurrent = byData;

	BBbWriteEmbedded(priv, 0x0A, byBBRxConf); /* CR10 */

		by_bb_rx_conf |= 0x20; /* 0010 0000 */

	priv->byBBVGACurrent = by_data;

	bb_write_embedded(priv, 0x0A, by_bb_rx_conf); /* CR10 */

}



/*
@@ -2246,12 +2246,12 @@ void BBvSetVGAGainOffset(struct vnt_private *priv, unsigned char byData) 
 *

 */

void

BBvSoftwareReset(struct vnt_private *priv)

bb_software_reset(struct vnt_private *priv)

{

	BBbWriteEmbedded(priv, 0x50, 0x40);

	BBbWriteEmbedded(priv, 0x50, 0);

	BBbWriteEmbedded(priv, 0x9C, 0x01);

	BBbWriteEmbedded(priv, 0x9C, 0);

	bb_write_embedded(priv, 0x50, 0x40);

	bb_write_embedded(priv, 0x50, 0);

	bb_write_embedded(priv, 0x9C, 0x01);

	bb_write_embedded(priv, 0x9C, 0);

}



/*
@@ -2267,13 +2267,13 @@ BBvSoftwareReset(struct vnt_private *priv) 
 *

 */

void

BBvPowerSaveModeON(struct vnt_private *priv)

bb_power_save_mode_on(struct vnt_private *priv)

{

	unsigned char byOrgData;

	unsigned char by_org_data;



	BBbReadEmbedded(priv, 0x0D, &byOrgData);

	byOrgData |= BIT(0);

	BBbWriteEmbedded(priv, 0x0D, byOrgData);

	bb_read_embedded(priv, 0x0D, &by_org_data);

	by_org_data |= BIT(0);

	bb_write_embedded(priv, 0x0D, by_org_data);

}



/*
@@ -2289,13 +2289,13 @@ BBvPowerSaveModeON(struct vnt_private *priv) 
 *

 */

void

BBvPowerSaveModeOFF(struct vnt_private *priv)

bb_power_save_mode_off(struct vnt_private *priv)

{

	unsigned char byOrgData;

	unsigned char by_org_data;



	BBbReadEmbedded(priv, 0x0D, &byOrgData);

	byOrgData &= ~(BIT(0));

	BBbWriteEmbedded(priv, 0x0D, byOrgData);

	bb_read_embedded(priv, 0x0D, &by_org_data);

	by_org_data &= ~(BIT(0));

	bb_write_embedded(priv, 0x0D, by_org_data);

}



/*
@@ -2304,7 +2304,7 @@ BBvPowerSaveModeOFF(struct vnt_private *priv) 
 * Parameters:

 *  In:

 *      priv          - Device Structure

 *      byAntennaMode    - Antenna Mode

 *      by_antenna_mode    - Antenna Mode

 *  Out:

 *      none

 *
@@ -2313,22 +2313,22 @@ BBvPowerSaveModeOFF(struct vnt_private *priv) 
 */



void

BBvSetTxAntennaMode(struct vnt_private *priv, unsigned char byAntennaMode)

bb_set_tx_antenna_mode(struct vnt_private *priv, unsigned char by_antenna_mode)

{

	unsigned char byBBTxConf;

	unsigned char by_bb_tx_conf;



	BBbReadEmbedded(priv, 0x09, &byBBTxConf); /* CR09 */

	if (byAntennaMode == ANT_DIVERSITY) {

	bb_read_embedded(priv, 0x09, &by_bb_tx_conf); /* CR09 */

	if (by_antenna_mode == ANT_DIVERSITY) {

		/* bit 1 is diversity */

		byBBTxConf |= 0x02;

	} else if (byAntennaMode == ANT_A) {

		by_bb_tx_conf |= 0x02;

	} else if (by_antenna_mode == ANT_A) {

		/* bit 2 is ANTSEL */

		byBBTxConf &= 0xF9; /* 1111 1001 */

	} else if (byAntennaMode == ANT_B) {

		byBBTxConf &= 0xFD; /* 1111 1101 */

		byBBTxConf |= 0x04;

		by_bb_tx_conf &= 0xF9; /* 1111 1001 */

	} else if (by_antenna_mode == ANT_B) {

		by_bb_tx_conf &= 0xFD; /* 1111 1101 */

		by_bb_tx_conf |= 0x04;

	}

	BBbWriteEmbedded(priv, 0x09, byBBTxConf); /* CR09 */

	bb_write_embedded(priv, 0x09, by_bb_tx_conf); /* CR09 */

}



/*
@@ -2337,7 +2337,7 @@ BBvSetTxAntennaMode(struct vnt_private *priv, unsigned char byAntennaMode) 
 * Parameters:

 *  In:

 *      priv          - Device Structure

 *      byAntennaMode    - Antenna Mode

 *      by_antenna_mode   - Antenna Mode

 *  Out:

 *      none

 *
@@ -2346,25 +2346,25 @@ BBvSetTxAntennaMode(struct vnt_private *priv, unsigned char byAntennaMode) 
 */



void

BBvSetRxAntennaMode(struct vnt_private *priv, unsigned char byAntennaMode)

bb_set_rx_antenna_mode(struct vnt_private *priv, unsigned char by_antenna_mode)

{

	unsigned char byBBRxConf;

	unsigned char by_bb_rx_conf;



	BBbReadEmbedded(priv, 0x0A, &byBBRxConf); /* CR10 */

	if (byAntennaMode == ANT_DIVERSITY) {

		byBBRxConf |= 0x01;

	bb_read_embedded(priv, 0x0A, &by_bb_rx_conf); /* CR10 */

	if (by_antenna_mode == ANT_DIVERSITY) {

		by_bb_rx_conf |= 0x01;



	} else if (byAntennaMode == ANT_A) {

		byBBRxConf &= 0xFC; /* 1111 1100 */

	} else if (byAntennaMode == ANT_B) {

		byBBRxConf &= 0xFE; /* 1111 1110 */

		byBBRxConf |= 0x02;

	} else if (by_antenna_mode == ANT_A) {

		by_bb_rx_conf &= 0xFC; /* 1111 1100 */

	} else if (by_antenna_mode == ANT_B) {

		by_bb_rx_conf &= 0xFE; /* 1111 1110 */

		by_bb_rx_conf |= 0x02;

	}

	BBbWriteEmbedded(priv, 0x0A, byBBRxConf); /* CR10 */

	bb_write_embedded(priv, 0x0A, by_bb_rx_conf); /* CR10 */

}



/*

 * Description: BBvSetDeepSleep

 * Description: bb_set_deep_sleep

 *

 * Parameters:

 *  In:
@@ -2376,9 +2376,9 @@ BBvSetRxAntennaMode(struct vnt_private *priv, unsigned char byAntennaMode) 
 *

 */

void

BBvSetDeepSleep(struct vnt_private *priv, unsigned char byLocalID)

bb_set_deep_sleep(struct vnt_private *priv, unsigned char by_local_id)

{

	BBbWriteEmbedded(priv, 0x0C, 0x17); /* CR12 */

	BBbWriteEmbedded(priv, 0x0D, 0xB9); /* CR13 */

	bb_write_embedded(priv, 0x0C, 0x17); /* CR12 */

	bb_write_embedded(priv, 0x0D, 0xB9); /* CR13 */

}

drivers/staging/vt6655/baseband.h

+19 −17
Original line number Diff line number Diff line
@@ -46,29 +46,31 @@ 
#define TOP_RATE_2M         0x00200000

#define TOP_RATE_1M         0x00100000



unsigned int BBuGetFrameTime(unsigned char byPreambleType,

			     unsigned char byPktType,

			     unsigned int cbFrameLength,

			     unsigned short wRate);

unsigned int bb_get_frame_time(unsigned char by_preamble_type,

			       unsigned char by_pkt_type,

			       unsigned int cb_frame_length,

			       unsigned short w_rate);



void vnt_get_phy_field(struct vnt_private *priv, u32 frame_length,

		       u16 tx_rate, u8 pkt_type, struct vnt_phy_field *phy);



bool BBbReadEmbedded(struct vnt_private *priv, unsigned char byBBAddr,

		     unsigned char *pbyData);

bool BBbWriteEmbedded(struct vnt_private *priv, unsigned char byBBAddr,

		      unsigned char byData);

bool bb_read_embedded(struct vnt_private *priv, unsigned char by_bb_addr,

		      unsigned char *pby_data);

bool bb_write_embedded(struct vnt_private *priv, unsigned char by_bb_addr,

		       unsigned char by_data);



void BBvSetShortSlotTime(struct vnt_private *priv);

void BBvSetVGAGainOffset(struct vnt_private *priv, unsigned char byData);

void bb_set_short_slot_time(struct vnt_private *priv);

void bb_set_vga_gain_offset(struct vnt_private *priv, unsigned char by_data);



/* VT3253 Baseband */

bool BBbVT3253Init(struct vnt_private *priv);

void BBvSoftwareReset(struct vnt_private *priv);

void BBvPowerSaveModeON(struct vnt_private *priv);

void BBvPowerSaveModeOFF(struct vnt_private *priv);

void BBvSetTxAntennaMode(struct vnt_private *priv, unsigned char byAntennaMode);

void BBvSetRxAntennaMode(struct vnt_private *priv, unsigned char byAntennaMode);

void BBvSetDeepSleep(struct vnt_private *priv, unsigned char byLocalID);

bool bb_vt3253_init(struct vnt_private *priv);

void bb_software_reset(struct vnt_private *priv);

void bb_power_save_mode_on(struct vnt_private *priv);

void bb_power_save_mode_off(struct vnt_private *priv);

void bb_set_tx_antenna_mode(struct vnt_private *priv,

			    unsigned char by_antenna_mode);

void bb_set_rx_antenna_mode(struct vnt_private *priv,

			    unsigned char by_antenna_mode);

void bb_set_deep_sleep(struct vnt_private *priv, unsigned char by_local_id);



#endif /* __BASEBAND_H__ */

drivers/staging/vt6655/card.c

+20 −20
Original line number Diff line number Diff line
@@ -195,22 +195,22 @@ bool CARDbSetPhyParameter(struct vnt_private *priv, u8 bb_type) 
			priv->abyBBVGA[0] = 0x20;

			priv->abyBBVGA[2] = 0x10;

			priv->abyBBVGA[3] = 0x10;

			BBbReadEmbedded(priv, 0xE7, &byData);

			bb_read_embedded(priv, 0xE7, &byData);

			if (byData == 0x1C)

				BBbWriteEmbedded(priv, 0xE7, priv->abyBBVGA[0]);

				bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]);



		} else if (priv->byRFType == RF_UW2452) {

			MACvSetBBType(priv->PortOffset, BB_TYPE_11A);

			priv->abyBBVGA[0] = 0x18;

			BBbReadEmbedded(priv, 0xE7, &byData);

			bb_read_embedded(priv, 0xE7, &byData);

			if (byData == 0x14) {

				BBbWriteEmbedded(priv, 0xE7, priv->abyBBVGA[0]);

				BBbWriteEmbedded(priv, 0xE1, 0x57);

				bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]);

				bb_write_embedded(priv, 0xE1, 0x57);

			}

		} else {

			MACvSetBBType(priv->PortOffset, BB_TYPE_11A);

		}

		BBbWriteEmbedded(priv, 0x88, 0x03);

		bb_write_embedded(priv, 0x88, 0x03);

		bySlot = C_SLOT_SHORT;

		bySIFS = C_SIFS_A;

		byDIFS = C_SIFS_A + 2 * C_SLOT_SHORT;
@@ -221,19 +221,19 @@ bool CARDbSetPhyParameter(struct vnt_private *priv, u8 bb_type) 
			priv->abyBBVGA[0] = 0x1C;

			priv->abyBBVGA[2] = 0x00;

			priv->abyBBVGA[3] = 0x00;

			BBbReadEmbedded(priv, 0xE7, &byData);

			bb_read_embedded(priv, 0xE7, &byData);

			if (byData == 0x20)

				BBbWriteEmbedded(priv, 0xE7, priv->abyBBVGA[0]);

				bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]);



		} else if (priv->byRFType == RF_UW2452) {

			priv->abyBBVGA[0] = 0x14;

			BBbReadEmbedded(priv, 0xE7, &byData);

			bb_read_embedded(priv, 0xE7, &byData);

			if (byData == 0x18) {

				BBbWriteEmbedded(priv, 0xE7, priv->abyBBVGA[0]);

				BBbWriteEmbedded(priv, 0xE1, 0xD3);

				bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]);

				bb_write_embedded(priv, 0xE1, 0xD3);

			}

		}

		BBbWriteEmbedded(priv, 0x88, 0x02);

		bb_write_embedded(priv, 0x88, 0x02);

		bySlot = C_SLOT_LONG;

		bySIFS = C_SIFS_BG;

		byDIFS = C_SIFS_BG + 2 * C_SLOT_LONG;
@@ -244,19 +244,19 @@ bool CARDbSetPhyParameter(struct vnt_private *priv, u8 bb_type) 
			priv->abyBBVGA[0] = 0x1C;

			priv->abyBBVGA[2] = 0x00;

			priv->abyBBVGA[3] = 0x00;

			BBbReadEmbedded(priv, 0xE7, &byData);

			bb_read_embedded(priv, 0xE7, &byData);

			if (byData == 0x20)

				BBbWriteEmbedded(priv, 0xE7, priv->abyBBVGA[0]);

				bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]);



		} else if (priv->byRFType == RF_UW2452) {

			priv->abyBBVGA[0] = 0x14;

			BBbReadEmbedded(priv, 0xE7, &byData);

			bb_read_embedded(priv, 0xE7, &byData);

			if (byData == 0x18) {

				BBbWriteEmbedded(priv, 0xE7, priv->abyBBVGA[0]);

				BBbWriteEmbedded(priv, 0xE1, 0xD3);

				bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]);

				bb_write_embedded(priv, 0xE1, 0xD3);

			}

		}

		BBbWriteEmbedded(priv, 0x88, 0x08);

		bb_write_embedded(priv, 0x88, 0x08);

		bySIFS = C_SIFS_BG;



		if (priv->bShortSlotTime) {
@@ -307,7 +307,7 @@ bool CARDbSetPhyParameter(struct vnt_private *priv, u8 bb_type) 
		priv->bySlot = bySlot;

		VNSvOutPortB(priv->PortOffset + MAC_REG_SLOT, priv->bySlot);



		BBvSetShortSlotTime(priv);

		bb_set_short_slot_time(priv);

	}

	if (priv->byCWMaxMin != byCWMaxMin) {

		priv->byCWMaxMin = byCWMaxMin;
@@ -428,7 +428,7 @@ void CARDbRadioPowerOff(struct vnt_private *priv) 


	MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_RXON);



	BBvSetDeepSleep(priv, priv->byLocalID);

	bb_set_deep_sleep(priv, priv->byLocalID);



	priv->bRadioOff = true;

	pr_debug("chester power off\n");

drivers/staging/vt6655/channel.c

+2 −2
Original line number Diff line number Diff line
@@ -173,7 +173,7 @@ bool set_channel(struct vnt_private *priv, struct ieee80211_channel *ch) 
	    priv->byBBVGACurrent != priv->abyBBVGA[0]) {

		priv->byBBVGACurrent = priv->abyBBVGA[0];



		BBvSetVGAGainOffset(priv, priv->byBBVGACurrent);

		bb_set_vga_gain_offset(priv, priv->byBBVGACurrent);

	}



	/* clear NAV */
@@ -195,7 +195,7 @@ bool set_channel(struct vnt_private *priv, struct ieee80211_channel *ch) 
	if (priv->bEnablePSMode)

		RFvWriteWakeProgSyn(priv, priv->byRFType, ch->hw_value);



	BBvSoftwareReset(priv);

	bb_software_reset(priv);



	if (priv->byLocalID > REV_ID_VT3253_B1) {

		unsigned long flags;

drivers/staging/vt6655/device_main.c

+18 −18

File changed.

Preview size limit exceeded, changes collapsed.

CRA Git | Maintained and supported by SUSTech CRA and CCSE