Commit af82455f authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'char-misc-4.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc 

Pull char/misc driver updates from Greg KH:
 "Here is the big set of new char/misc driver drivers and features for
  4.12-rc1.

  There's lots of new drivers added this time around, new firmware
  drivers from Google, more auxdisplay drivers, extcon drivers, fpga
  drivers, and a bunch of other driver updates. Nothing major, except if
  you happen to have the hardware for these drivers, and then you will
  be happy :)

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'char-misc-4.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (136 commits)
  firmware: google memconsole: Fix return value check in platform_memconsole_init()
  firmware: Google VPD: Fix return value check in vpd_platform_init()
  goldfish_pipe: fix build warning about using too much stack.
  goldfish_pipe: An implementation of more parallel pipe
  fpga fr br: update supported version numbers
  fpga: region: release FPGA region reference in error path
  fpga altera-hps2fpga: disable/unprepare clock on error in alt_fpga_bridge_probe()
  mei: drop the TODO from samples
  firmware: Google VPD sysfs driver
  firmware: Google VPD: import lib_vpd source files
  misc: lkdtm: Add volatile to intentional NULL pointer reference
  eeprom: idt_89hpesx: Add OF device ID table
  misc: ds1682: Add OF device ID table
  misc: tsl2550: Add OF device ID table
  w1: Remove unneeded use of assert() and remove w1_log.h
  w1: Use kernel common min() implementation
  uio_mf624: Align memory regions to page size and set correct offsets
  uio_mf624: Refactor memory info initialization
  uio: Allow handling of non page-aligned memory regions
  hangcheck-timer: Fix typo in comment
  ...
parents 0be75179 2a76f89f

Documentation/DocBook/rapidio.tmpl

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@@ -128,9 +128,6 @@ 
     </sect1>

     <sect1 id="Device_model_support"><title>Device model support</title>

!Idrivers/rapidio/rio-driver.c

     </sect1>

     <sect1 id="Sysfs_support"><title>Sysfs support</title>

!Idrivers/rapidio/rio-sysfs.c

     </sect1>

     <sect1 id="PPC32_support"><title>PPC32 support</title>

!Iarch/powerpc/sysdev/fsl_rio.c

Documentation/devicetree/bindings/auxdisplay/hit,hd44780.txt

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DT bindings for the Hitachi HD44780 Character LCD Controller



The Hitachi HD44780 Character LCD Controller is commonly used on character LCDs

that can display one or more lines of text. It exposes an M6800 bus interface,

which can be used in either 4-bit or 8-bit mode.



Required properties:

  - compatible: Must contain "hit,hd44780",

  - data-gpios: Must contain an array of either 4 or 8 GPIO specifiers,

    referring to the GPIO pins connected to the data signal lines DB0-DB7

    (8-bit mode) or DB4-DB7 (4-bit mode) of the LCD Controller's bus interface,

  - enable-gpios: Must contain a GPIO specifier, referring to the GPIO pin

    connected to the "E" (Enable) signal line of the LCD Controller's bus

    interface,

  - rs-gpios: Must contain a GPIO specifier, referring to the GPIO pin

    connected to the "RS" (Register Select) signal line of the LCD Controller's

    bus interface,

  - display-height-chars: Height of the display, in character cells,

  - display-width-chars: Width of the display, in character cells.



Optional properties:

  - rw-gpios: Must contain a GPIO specifier, referring to the GPIO pin

    connected to the "RW" (Read/Write) signal line of the LCD Controller's bus

    interface,

  - backlight-gpios: Must contain a GPIO specifier, referring to the GPIO pin

    used for enabling the LCD's backlight,

  - internal-buffer-width: Internal buffer width (default is 40 for displays

    with 1 or 2 lines, and display-width-chars for displays with more than 2

    lines).



Example:



	auxdisplay {

		compatible = "hit,hd44780";



		data-gpios = <&hc595 0 GPIO_ACTIVE_HIGH>,

			     <&hc595 1 GPIO_ACTIVE_HIGH>,

			     <&hc595 2 GPIO_ACTIVE_HIGH>,

			     <&hc595 3 GPIO_ACTIVE_HIGH>;

		enable-gpios = <&hc595 4 GPIO_ACTIVE_HIGH>;

		rs-gpios = <&hc595 5 GPIO_ACTIVE_HIGH>;



		display-height-chars = <2>;

		display-width-chars = <16>;

	};

Documentation/devicetree/bindings/firmware/coreboot.txt

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COREBOOT firmware information



The device tree node to communicate the location of coreboot's memory-resident

bookkeeping structures to the kernel. Since coreboot itself cannot boot a

device-tree-based kernel (yet), this node needs to be inserted by a

second-stage bootloader (a coreboot "payload").



Required properties:

 - compatible: Should be "coreboot"

 - reg: Address and length of the following two memory regions, in order:

	1.) The coreboot table. This is a list of variable-sized descriptors

	that contain various compile- and run-time generated firmware

	parameters. It is identified by the magic string "LBIO" in its first

	four bytes.

	See coreboot's src/commonlib/include/commonlib/coreboot_tables.h for

	details.

	2.) The CBMEM area. This is a downward-growing memory region used by

	coreboot to dynamically allocate data structures that remain resident.

	It may or may not include the coreboot table as one of its members. It

	is identified by a root node descriptor with the magic number

	0xc0389481 that resides in the topmost 8 bytes of the area.

	See coreboot's src/include/imd.h for details.



Example:

	firmware {

		ranges;



		coreboot {

			compatible = "coreboot";

			reg = <0xfdfea000 0x264>,

			      <0xfdfea000 0x16000>;

		}

	};

Documentation/devicetree/bindings/fpga/altera-pr-ip.txt

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Altera Arria10 Partial Reconfiguration IP



Required properties:

- compatible : should contain "altr,a10-pr-ip"

- reg        : base address and size for memory mapped io.



Example:



	fpga_mgr: fpga-mgr@ff20c000 {

		compatible = "altr,a10-pr-ip";

		reg = <0xff20c000 0x10>;

	};

Documentation/devicetree/bindings/fpga/fpga-region.txt

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@@ -186,6 +186,7 @@ Optional properties: 
	otherwise full reconfiguration is done.

- external-fpga-config : boolean, set if the FPGA has already been configured

	prior to OS boot up.

- encrypted-fpga-config : boolean, set if the bitstream is encrypted

- region-unfreeze-timeout-us : The maximum time in microseconds to wait for

	bridges to successfully become enabled after the region has been

	programmed.

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