drm/nouveau/flcn: reset sec2/gsp falcons harder (af696a61) · Commits · 戴 / test

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

+1 −0

Original line number	Diff line number	Diff line
		@@ -19,4 +19,5 @@ int nvkm_falcon_v1_enable(struct nvkm_falcon *);
		void nvkm_falcon_v1_disable(struct nvkm_falcon *);

		void gp102_sec2_flcn_bind_context(struct nvkm_falcon , struct nvkm_memory );
		int gp102_sec2_flcn_enable(struct nvkm_falcon *);
		#endif

+1 −0

Original line number	Diff line number	Diff line
		@@ -92,6 +92,7 @@ struct nvkm_falcon_func {
		void (start)(struct nvkm_falcon );
		int (enable)(struct nvkm_falcon falcon);
		void (disable)(struct nvkm_falcon falcon);
		int (reset)(struct nvkm_falcon );

		struct {
		u32 head;

+10 −1

Original line number	Diff line number	Diff line
		@@ -47,6 +47,15 @@ gp102_sec2_intr(struct nvkm_sec2 *sec2)
		}
		}

		int
		gp102_sec2_flcn_enable(struct nvkm_falcon *falcon)
		{
		nvkm_falcon_mask(falcon, 0x3c0, 0x00000001, 0x00000001);
		udelay(10);
		nvkm_falcon_mask(falcon, 0x3c0, 0x00000001, 0x00000000);
		return nvkm_falcon_v1_enable(falcon);
		}

		void
		gp102_sec2_flcn_bind_context(struct nvkm_falcon *falcon,
		struct nvkm_memory *ctx)
		@@ -99,7 +108,7 @@ gp102_sec2_flcn = {
		.clear_interrupt = nvkm_falcon_v1_clear_interrupt,
		.set_start_addr = nvkm_falcon_v1_set_start_addr,
		.start = nvkm_falcon_v1_start,
		.enable = nvkm_falcon_v1_enable,
		.enable = gp102_sec2_flcn_enable,
		.disable = nvkm_falcon_v1_disable,
		.cmdq = { 0xa00, 0xa04, 8 },
		.msgq = { 0xa30, 0xa34, 8 },

+1 −1

Original line number	Diff line number	Diff line
		@@ -32,7 +32,7 @@ gv100_gsp_flcn = {
		.clear_interrupt = nvkm_falcon_v1_clear_interrupt,
		.set_start_addr = nvkm_falcon_v1_set_start_addr,
		.start = nvkm_falcon_v1_start,
		.enable = nvkm_falcon_v1_enable,
		.enable = gp102_sec2_flcn_enable,
		.disable = nvkm_falcon_v1_disable,
		};