Commit af4d191e authored by Peter Griffin's avatar Peter Griffin Committed by Maxime Coquelin
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ARM: STi: DT: Add STiH407 family tsin4 pinctrl configuration



tsin4 can only be configured for serial data transfer. However
depending on board design, two alternate pin configurations
are available. One in pin-controller-front0 and the other in
pin-controller-front1.

pinctrl_tsin4_serial_alt3 is brought out on B2120 reference
design as TSC on NIMA slot of the B2004A daughter board.

Signed-off-by: default avatarPeter Griffin <peter.griffin@linaro.org>
Signed-off-by: default avatarMaxime Coquelin <maxime.coquelin@st.com>
parent 36cfc8c1
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+24 −0
Original line number Diff line number Diff line
@@ -535,6 +535,18 @@
					};
				};
			};

			tsin4 {
				pinctrl_tsin4_serial_alt3: tsin4_serial_alt3 {
					st,pins {
						DATA7 = <&pio14 6 ALT3 IN SE_NICLK_IO 0 CLK_A>;
						CLKIN = <&pio14 5 ALT3 IN CLKNOTDATA 0 CLK_A>;
						VALID = <&pio14 3 ALT3 IN SE_NICLK_IO 0 CLK_B>;
						ERROR = <&pio14 2 ALT3 IN SE_NICLK_IO 0 CLK_B>;
						PKCLK = <&pio14 4 ALT3 IN SE_NICLK_IO 0 CLK_A>;
					};
				};
			};
		};

		pin-controller-front1 {
@@ -548,6 +560,18 @@
			interrupts-names = "irqmux";
			ranges = <0 0x09210000 0x10000>;

			tsin4 {
				pinctrl_tsin4_serial_alt1: tsin4_serial_alt1 {
					st,pins {
						DATA7 = <&pio20 4 ALT1 IN SE_NICLK_IO 0 CLK_A>;
						CLKIN = <&pio20 3 ALT1 IN CLKNOTDATA 0 CLK_A>;
						VALID = <&pio20 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
						ERROR = <&pio20 0 ALT1 IN SE_NICLK_IO 0 CLK_A>;
						PKCLK = <&pio20 2 ALT1 IN SE_NICLK_IO 0 CLK_A>;
					};
				};
			};

			pio20: pio@09210000 {
				gpio-controller;
				#gpio-cells = <1>;