Commit af3cf72f authored by Simon Horman's avatar Simon Horman
Browse files

arm64: dts: r8a7796: salvator-x: enable UHS for SDHI 0 & 3



Based on work for the r8a7796 by Wolfram Sang.

Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
Reviewed-by: default avatarWolfram Sang <wsa+renesas@sang-engineering.com>
parent e2420b92
Loading
Loading
Loading
Loading
+20 −2
Original line number Diff line number Diff line
@@ -97,11 +97,25 @@
	sdhi0_pins: sd0 {
		groups = "sdhi0_data4", "sdhi0_ctrl";
		function = "sdhi0";
		power-source = <3300>;
	};

	sdhi0_pins_uhs: sd0_uhs {
		groups = "sdhi0_data4", "sdhi0_ctrl";
		function = "sdhi0";
		power-source = <1800>;
	};

	sdhi3_pins: sd3 {
		groups = "sdhi3_data4", "sdhi3_ctrl";
		function = "sdhi3";
		power-source = <3300>;
	};

	sdhi3_pins_uhs: sd3_uhs {
		groups = "sdhi3_data4", "sdhi3_ctrl";
		function = "sdhi3";
		power-source = <1800>;
	};
};

@@ -115,25 +129,29 @@

&sdhi0 {
	pinctrl-0 = <&sdhi0_pins>;
	pinctrl-names = "default";
	pinctrl-1 = <&sdhi0_pins_uhs>;
	pinctrl-names = "default", "state_uhs";

	vmmc-supply = <&vcc_sdhi0>;
	vqmmc-supply = <&vccq_sdhi0>;
	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
	wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
	bus-width = <4>;
	sd-uhs-sdr50;
	status = "okay";
};

&sdhi3 {
	pinctrl-0 = <&sdhi3_pins>;
	pinctrl-names = "default";
	pinctrl-1 = <&sdhi3_pins_uhs>;
	pinctrl-names = "default", "state_uhs";

	vmmc-supply = <&vcc_sdhi3>;
	vqmmc-supply = <&vccq_sdhi3>;
	cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
	wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
	bus-width = <4>;
	sd-uhs-sdr50;
	status = "okay";
};