Commit aef9a119 authored by Bjorn Andersson's avatar Bjorn Andersson
Browse files

arm64: dts: qcom: sdm845-db845c: Add hdmi bridge nodes



Enable MDSS and DSI and add the LT9611 HDMI bridge. Also add the HDMI
audio nodes.

Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Co-developed-by: default avatarSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: default avatarSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20200727075532.1932134-1-vkoul@kernel.org


Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent 04a3605b
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+118 −0
Original line number Diff line number Diff line
@@ -74,6 +74,17 @@
		};
	};

	hdmi-out {
		compatible = "hdmi-connector";
		type = "a";

		port {
			hdmi_con: endpoint {
				remote-endpoint = <&lt9611_out>;
			};
		};
	};

	lt9611_1v8: lt9611-vdd18-regulator {
		compatible = "regulator-fixed";
		regulator-name = "LT9611_1V8";
@@ -382,6 +393,25 @@
	firmware-name = "qcom/sdm845/cdsp.mdt";
};

&dsi0 {
	status = "okay";
	vdda-supply = <&vreg_l26a_1p2>;

	ports {
		port@1 {
			endpoint {
				remote-endpoint = <&lt9611_a>;
				data-lanes = <0 1 2 3>;
			};
		};
	};
};

&dsi0_phy {
	status = "okay";
	vdds-supply = <&vreg_l1a_0p875>;
};

&gcc {
	protected-clocks = <GCC_QSPI_CORE_CLK>,
			   <GCC_QSPI_CORE_CLK_SRC>,
@@ -395,6 +425,48 @@
	};
};

&i2c10 {
	status = "okay";
	clock-frequency = <400000>;

	lt9611_codec: hdmi-bridge@3b {
		compatible = "lontium,lt9611";
		reg = <0x3b>;
		#sound-dai-cells = <1>;

		interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>;

		reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>;

		vdd-supply = <&lt9611_1v8>;
		vcc-supply = <&lt9611_3v3>;

		pinctrl-names = "default";
		pinctrl-0 = <&lt9611_irq_pin>, <&dsi_sw_sel>;

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;

				lt9611_out: endpoint {
					remote-endpoint = <&hdmi_con>;
				};
			};

			port@1 {
				reg = <1>;

				lt9611_a: endpoint {
					remote-endpoint = <&dsi0_out>;
				};
			};
		};
	};
};

&i2c11 {
	/* On Low speed expansion */
	label = "LS-I2C1";
@@ -407,6 +479,14 @@
	status = "okay";
};

&mdss {
	status = "okay";
};

&mdss_mdp {
	status = "okay";
};

&mss_pil {
	status = "okay";
	firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
@@ -612,6 +692,21 @@
		};
	};

	hdmi-dai-link {
		link-name = "HDMI Playback";
		cpu {
			sound-dai = <&q6afedai QUATERNARY_MI2S_RX>;
		};

		platform {
			sound-dai = <&q6routing>;
		};

		codec {
			sound-dai =  <&lt9611_codec 0>;
		};
	};

	slim-dai-link {
		link-name = "SLIM Playback";
		cpu {
@@ -686,6 +781,21 @@
		};
	};

	dsi_sw_sel: dsi-sw-sel {
		pins = "gpio120";
		function = "gpio";

		drive-strength = <2>;
		bias-disable;
		output-high;
	};

	lt9611_irq_pin: lt9611-irq {
		pins = "gpio84";
		function = "gpio";
		bias-disable;
	};

	pcie0_default_state: pcie0-default {
		clkreq {
			pins = "gpio36";
@@ -943,6 +1053,14 @@
	};
};

&qup_i2c10_default {
	pinconf {
		pins = "gpio55", "gpio56";
		drive-strength = <2>;
		bias-disable;
	};
};

&qup_uart6_default {
	pinmux {
		pins = "gpio45", "gpio46", "gpio47", "gpio48";