Commit aec8da04 authored Nov 10, 2020 by Thomas Gleixner

x86/ioapic: Correct the PCI/ISA trigger type selection



PCI's default trigger type is level and ISA's is edge. The recent
refactoring made it the other way round, which went unnoticed as it seems
only to cause havoc on some AMD systems.

Make the comment and code do the right thing again.

Fixes: a27dca64 ("x86/io_apic: Cleanup trigger/polarity helpers")
Reported-by: Tom Lendacky <thomas.lendacky@amd.com>
Reported-by: Borislav Petkov <bp@alien8.de>
Reported-by: Qian Cai <cai@redhat.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Tom Lendacky <thomas.lendacky@amd.com>
Cc: David Woodhouse <dwmw@amazon.co.uk>
Link: https://lore.kernel.org/r/87d00lgu13.fsf@nanos.tec.linutronix.de

parent f36a74b9

arch/x86/kernel/apic/io_apic.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -809,9 +809,9 @@ static bool irq_is_level(int idx)
		case MP_IRQTRIG_DEFAULT:
		/*
		* Conforms to spec, ie. bus-type dependent trigger
		* mode. PCI defaults to egde, ISA to level.
		* mode. PCI defaults to level, ISA to edge.
		*/
		level = test_bit(bus, mp_bus_not_pci);
		level = !test_bit(bus, mp_bus_not_pci);
		/* Take EISA into account */
		return eisa_irq_is_level(idx, bus, level);
		case MP_IRQTRIG_EDGE:

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