Commit ae2de101 authored by Catalin Marinas's avatar Catalin Marinas
Browse files

ARM: LPAE: Add identity mapping support for the 3-level page table format 



With LPAE, the pgd is a separate page table with entries pointing to the
pmd. The identity_mapping_add() function needs to ensure that the pgd is
populated before populating the pmd level. The do..while blocks now loop
over the pmd in order to have the same implementation for the two page
table formats. The pmd_addr_end() definition has been removed and the
generic one used instead. The pmd clean-up is done in the pgd_free()
function.

Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 14d8c951

arch/arm/mm/idmap.c

+27 −1
Original line number Diff line number Diff line
@@ -8,6 +8,31 @@ 


pgd_t *idmap_pgd;



#ifdef CONFIG_ARM_LPAE

static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end,

	unsigned long prot)

{

	pmd_t *pmd;

	unsigned long next;



	if (pud_none_or_clear_bad(pud) || (pud_val(*pud) & L_PGD_SWAPPER)) {

		pmd = pmd_alloc_one(&init_mm, addr);

		if (!pmd) {

			pr_warning("Failed to allocate identity pmd.\n");

			return;

		}

		pud_populate(&init_mm, pud, pmd);

		pmd += pmd_index(addr);

	} else

		pmd = pmd_offset(pud, addr);



	do {

		next = pmd_addr_end(addr, end);

		*pmd = __pmd((addr & PMD_MASK) | prot);

		flush_pmd_entry(pmd);

	} while (pmd++, addr = next, addr != end);

}

#else	/* !CONFIG_ARM_LPAE */

static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end,

	unsigned long prot)

{
@@ -19,6 +44,7 @@ static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end, 
	pmd[1] = __pmd(addr);

	flush_pmd_entry(pmd);

}

#endif	/* CONFIG_ARM_LPAE */



static void idmap_add_pud(pgd_t *pgd, unsigned long addr, unsigned long end,

	unsigned long prot)
@@ -36,7 +62,7 @@ static void identity_mapping_add(pgd_t *pgd, unsigned long addr, unsigned long e 
{

	unsigned long prot, next;



	prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE;

	prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AF;

	if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale())

		prot |= PMD_BIT4;

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