Commit ae05ddc9 authored by Dmitry Osipenko's avatar Dmitry Osipenko Committed by Thierry Reding
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ARM: dts: tegra30: beaver: Set up voltage regulators for DVFS 



Set min/max voltage and couple CPU/CORE regulators.

Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 7860c873

arch/arm/boot/dts/tegra30-beaver.dts

+13 −3
Original line number Diff line number Diff line
@@ -1806,9 +1806,14 @@ 


				vddctrl_reg: vddctrl {

					regulator-name = "vdd_cpu,vdd_sys";

					regulator-min-microvolt = <1000000>;

					regulator-max-microvolt = <1000000>;

					regulator-min-microvolt = <800000>;

					regulator-max-microvolt = <1250000>;

					regulator-coupled-with = <&core_vdd_reg>;

					regulator-coupled-max-spread = <300000>;

					regulator-max-step-microvolt = <100000>;

					regulator-always-on;



					nvidia,tegra-cpu-regulator;

				};



				vio_reg: vio {
@@ -1868,17 +1873,22 @@ 
			};

		};



		tps62361@60 {

		core_vdd_reg: tps62361@60 {

			compatible = "ti,tps62361";

			reg = <0x60>;



			regulator-name = "tps62361-vout";

			regulator-min-microvolt = <500000>;

			regulator-max-microvolt = <1500000>;

			regulator-coupled-with = <&vddctrl_reg>;

			regulator-coupled-max-spread = <300000>;

			regulator-max-step-microvolt = <100000>;

			regulator-boot-on;

			regulator-always-on;

			ti,vsel0-state-high;

			ti,vsel1-state-high;



			nvidia,tegra-core-regulator;

		};

	};

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