Commit adefe55e authored by Thomas Gleixner's avatar Thomas Gleixner Committed by Borislav Petkov
Browse files

x86/kernel: Convert to new CPU match macros 



The new macro set has a consistent namespace and uses C99 initializers
instead of the grufty C89 ones.

Get rid the of the local macro wrappers for consistency.

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Reviewed-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Link: https://lkml.kernel.org/r/20200320131509.250559388@linutronix.de
parent 320debe5

arch/x86/kernel/apic/apic.c

+13 −19
Original line number Diff line number Diff line
@@ -546,12 +546,6 @@ static struct clock_event_device lapic_clockevent = { 
};

static DEFINE_PER_CPU(struct clock_event_device, lapic_events);



#define DEADLINE_MODEL_MATCH_FUNC(model, func)	\

	{ X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, (unsigned long)&func }



#define DEADLINE_MODEL_MATCH_REV(model, rev)	\

	{ X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, (unsigned long)rev }



static u32 hsx_deadline_rev(void)

{

	switch (boot_cpu_data.x86_stepping) {
@@ -588,23 +582,23 @@ static u32 skx_deadline_rev(void) 
}



static const struct x86_cpu_id deadline_match[] = {

	DEADLINE_MODEL_MATCH_FUNC( INTEL_FAM6_HASWELL_X,	hsx_deadline_rev),

	DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_BROADWELL_X,	0x0b000020),

	DEADLINE_MODEL_MATCH_FUNC( INTEL_FAM6_BROADWELL_D,	bdx_deadline_rev),

	DEADLINE_MODEL_MATCH_FUNC( INTEL_FAM6_SKYLAKE_X,	skx_deadline_rev),

	X86_MATCH_INTEL_FAM6_MODEL( HASWELL_X,		&hsx_deadline_rev),

	X86_MATCH_INTEL_FAM6_MODEL( BROADWELL_X,	0x0b000020),

	X86_MATCH_INTEL_FAM6_MODEL( BROADWELL_D,	&bdx_deadline_rev),

	X86_MATCH_INTEL_FAM6_MODEL( SKYLAKE_X,		&skx_deadline_rev),



	DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_HASWELL,		0x22),

	DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_HASWELL_L,	0x20),

	DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_HASWELL_G,	0x17),

	X86_MATCH_INTEL_FAM6_MODEL( HASWELL,		0x22),

	X86_MATCH_INTEL_FAM6_MODEL( HASWELL_L,		0x20),

	X86_MATCH_INTEL_FAM6_MODEL( HASWELL_G,		0x17),



	DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_BROADWELL,	0x25),

	DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_BROADWELL_G,	0x17),

	X86_MATCH_INTEL_FAM6_MODEL( BROADWELL,		0x25),

	X86_MATCH_INTEL_FAM6_MODEL( BROADWELL_G,	0x17),



	DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_SKYLAKE_L,	0xb2),

	DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_SKYLAKE,		0xb2),

	X86_MATCH_INTEL_FAM6_MODEL( SKYLAKE_L,		0xb2),

	X86_MATCH_INTEL_FAM6_MODEL( SKYLAKE,		0xb2),



	DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_KABYLAKE_L,	0x52),

	DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_KABYLAKE,		0x52),

	X86_MATCH_INTEL_FAM6_MODEL( KABYLAKE_L,		0x52),

	X86_MATCH_INTEL_FAM6_MODEL( KABYLAKE,		0x52),



	{},

};

arch/x86/kernel/smpboot.c

+1 −1
Original line number Diff line number Diff line
@@ -466,7 +466,7 @@ static bool match_smt(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o) 
 */



static const struct x86_cpu_id snc_cpu[] = {

	{ X86_VENDOR_INTEL, 6, INTEL_FAM6_SKYLAKE_X },

	X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, NULL),

	{}

};

arch/x86/kernel/tsc_msr.c

+7 −7
Original line number Diff line number Diff line
@@ -63,13 +63,13 @@ static const struct freq_desc freq_desc_lgm = { 
};



static const struct x86_cpu_id tsc_msr_cpu_ids[] = {

	INTEL_CPU_FAM6(ATOM_SALTWELL_MID,	freq_desc_pnw),

	INTEL_CPU_FAM6(ATOM_SALTWELL_TABLET,	freq_desc_clv),

	INTEL_CPU_FAM6(ATOM_SILVERMONT,		freq_desc_byt),

	INTEL_CPU_FAM6(ATOM_SILVERMONT_MID,	freq_desc_tng),

	INTEL_CPU_FAM6(ATOM_AIRMONT,		freq_desc_cht),

	INTEL_CPU_FAM6(ATOM_AIRMONT_MID,	freq_desc_ann),

	INTEL_CPU_FAM6(ATOM_AIRMONT_NP,		freq_desc_lgm),

	X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL_MID,	&freq_desc_pnw),

	X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL_TABLET,&freq_desc_clv),

	X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT,	&freq_desc_byt),

	X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID,	&freq_desc_tng),

	X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT,	&freq_desc_cht),

	X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT_MID,	&freq_desc_ann),

	X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT_NP,	&freq_desc_lgm),

	{}

};

arch/x86/power/cpu.c

+2 −14
Original line number Diff line number Diff line
@@ -475,20 +475,8 @@ static int msr_save_cpuid_features(const struct x86_cpu_id *c) 
}



static const struct x86_cpu_id msr_save_cpu_table[] = {

	{

		.vendor = X86_VENDOR_AMD,

		.family = 0x15,

		.model = X86_MODEL_ANY,

		.feature = X86_FEATURE_ANY,

		.driver_data = (kernel_ulong_t)msr_save_cpuid_features,

	},

	{

		.vendor = X86_VENDOR_AMD,

		.family = 0x16,

		.model = X86_MODEL_ANY,

		.feature = X86_FEATURE_ANY,

		.driver_data = (kernel_ulong_t)msr_save_cpuid_features,

	},

	X86_MATCH_VENDOR_FAM(AMD, 0x15, &msr_save_cpuid_features),

	X86_MATCH_VENDOR_FAM(AMD, 0x16, &msr_save_cpuid_features),

	{}

};

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