Commit ade12b86 authored by Dave Martin's avatar Dave Martin Committed by Catalin Marinas
Browse files

arm64: docs: cpu-feature-registers: Document ID_AA64PFR1_EL1 



Commit d71be2b6 ("arm64: cpufeature: Detect SSBS and advertise
to userspace") exposes ID_AA64PFR1_EL1 to userspace, but didn't
update the documentation to match.

Add it.

Acked-by: default avatarWill Deacon <will@kernel.org>
Signed-off-by: default avatarDave Martin <Dave.Martin@arm.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 7db3e57e

Documentation/arm64/cpu-feature-registers.rst

+11 −4
Original line number Diff line number Diff line
@@ -168,8 +168,15 @@ infrastructure: 
     +------------------------------+---------+---------+





  3) MIDR_EL1 - Main ID Register

  3) ID_AA64PFR1_EL1 - Processor Feature Register 1

     +------------------------------+---------+---------+

     | Name                         |  bits   | visible |

     +------------------------------+---------+---------+

     | SSBS                         | [7-4]   |    y    |

     +------------------------------+---------+---------+





  4) MIDR_EL1 - Main ID Register

     +------------------------------+---------+---------+

     | Name                         |  bits   | visible |

     +------------------------------+---------+---------+
@@ -188,7 +195,7 @@ infrastructure: 
   as available on the CPU where it is fetched and is not a system

   wide safe value.



  4) ID_AA64ISAR1_EL1 - Instruction set attribute register 1

  5) ID_AA64ISAR1_EL1 - Instruction set attribute register 1



     +------------------------------+---------+---------+

     | Name                         |  bits   | visible |
@@ -210,7 +217,7 @@ infrastructure: 
     | DPB                          | [3-0]   |    y    |

     +------------------------------+---------+---------+



  5) ID_AA64MMFR2_EL1 - Memory model feature register 2

  6) ID_AA64MMFR2_EL1 - Memory model feature register 2



     +------------------------------+---------+---------+

     | Name                         |  bits   | visible |
@@ -218,7 +225,7 @@ infrastructure: 
     | AT                           | [35-32] |    y    |

     +------------------------------+---------+---------+



  6) ID_AA64ZFR0_EL1 - SVE feature ID register 0

  7) ID_AA64ZFR0_EL1 - SVE feature ID register 0



     +------------------------------+---------+---------+

     | Name                         |  bits   | visible |

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