Commit add5c42e authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'sunxi-dt64-for-4.15' of... 

Merge tag 'sunxi-dt64-for-4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt

Pull "Allwinner arm64 DT changes for 4.15" from Maxime Ripard:

Most notable changes:
  - SPI and DMA support on the a64
  - New boards: NanoPi NEO Plus2

* tag 'sunxi-dt64-for-4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  arm: allwinner: Correct unit name in devicetree binding example
  arm64: allwinner: a64: add dma controller references to spi nodes
  arm64: allwinner: a64: Add device node for DMA controller
  arm64: allwinner: a64: Fix node with unit name and no reg property
  arm64: allwinner: a64: Fix simple-bus unit address format error
  arm64: allwinner: h5: add NanoPi NEO Plus2 DT support
  arm64: allwinner: a64: add SPI nodes
parents 9f4fb208 d25d4182

Documentation/devicetree/bindings/dma/sun6i-dma.txt

+1 −1
Original line number Diff line number Diff line
@@ -18,7 +18,7 @@ Required properties: 
- #dma-cells :	Should be 1, a single cell holding a line request number



Example:

	dma: dma-controller@01c02000 {

	dma: dma-controller@1c02000 {

		compatible = "allwinner,sun6i-a31-dma";

		reg = <0x01c02000 0x1000>;

		interrupts = <0 50 4>;

arch/arm64/boot/dts/allwinner/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb 
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb

dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb

dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb

dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb



always		:= $(dtb-y)

subdir-y	:= $(dts-dirs)

arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi

+58 −2
Original line number Diff line number Diff line
@@ -136,6 +136,17 @@ 
			reg = <0x01c00000 0x1000>;

		};



		dma: dma-controller@1c02000 {

			compatible = "allwinner,sun50i-a64-dma";

			reg = <0x01c02000 0x1000>;

			interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&ccu CLK_BUS_DMA>;

			dma-channels = <8>;

			dma-requests = <27>;

			resets = <&ccu RST_BUS_DMA>;

			#dma-cells = <1>;

		};



		mmc0: mmc@1c0f000 {

			compatible = "allwinner,sun50i-a64-mmc";

			reg = <0x01c0f000 0x1000>;
@@ -325,7 +336,17 @@ 
				drive-strength = <40>;

			};



			uart0_pins_a: uart0@0 {

			spi0_pins: spi0 {

				pins = "PC0", "PC1", "PC2", "PC3";

				function = "spi0";

			};



			spi1_pins: spi1 {

				pins = "PD0", "PD1", "PD2", "PD3";

				function = "spi1";

			};



			uart0_pins_a: uart0 {

				pins = "PB8", "PB9";

				function = "uart0";

			};
@@ -449,6 +470,41 @@ 
			#size-cells = <0>;

		};





		spi0: spi@1c68000 {

			compatible = "allwinner,sun8i-h3-spi";

			reg = <0x01c68000 0x1000>;

			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;

			clock-names = "ahb", "mod";

			dmas = <&dma 23>, <&dma 23>;

			dma-names = "rx", "tx";

			pinctrl-names = "default";

			pinctrl-0 = <&spi0_pins>;

			resets = <&ccu RST_BUS_SPI0>;

			status = "disabled";

			num-cs = <1>;

			#address-cells = <1>;

			#size-cells = <0>;

		};



		spi1: spi@1c69000 {

			compatible = "allwinner,sun8i-h3-spi";

			reg = <0x01c69000 0x1000>;

			interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;

			clock-names = "ahb", "mod";

			dmas = <&dma 24>, <&dma 24>;

			dma-names = "rx", "tx";

			pinctrl-names = "default";

			pinctrl-0 = <&spi1_pins>;

			resets = <&ccu RST_BUS_SPI1>;

			status = "disabled";

			num-cs = <1>;

			#address-cells = <1>;

			#size-cells = <0>;

		};



		gic: interrupt-controller@1c81000 {

			compatible = "arm,gic-400";

			reg = <0x01c81000 0x1000>,
@@ -497,7 +553,7 @@ 
			interrupt-controller;

			#interrupt-cells = <3>;



			r_rsb_pins: rsb@0 {

			r_rsb_pins: rsb {

				pins = "PL0", "PL1";

				function = "s_rsb";

			};

arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts

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+193 −0
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2017 Antony Antony <antony@phenome.org>

 * Copyright (C) 2016 ARM Ltd.

 *

 * This file is dual-licensed: you can use it either under the terms

 * of the GPL or the X11 license, at your option. Note that this dual

 * licensing only applies to this file, and not this project as a

 * whole.

 *

 *  a) This file is free software; you can redistribute it and/or

 *     modify it under the terms of the GNU General Public License as

 *     published by the Free Software Foundation; either version 2 of the

 *     License, or (at your option) any later version.

 *

 *     This file is distributed in the hope that it will be useful,

 *     but WITHOUT ANY WARRANTY; without even the implied warranty of

 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 *     GNU General Public License for more details.

 *

 * Or, alternatively,

 *

 *  b) Permission is hereby granted, free of charge, to any person

 *     obtaining a copy of this software and associated documentation

 *     files (the "Software"), to deal in the Software without

 *     restriction, including without limitation the rights to use,

 *     copy, modify, merge, publish, distribute, sublicense, and/or

 *     sell copies of the Software, and to permit persons to whom the

 *     Software is furnished to do so, subject to the following

 *     conditions:

 *

 *     The above copyright notice and this permission notice shall be

 *     included in all copies or substantial portions of the Software.

 *

 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,

 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES

 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND

 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT

 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,

 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING

 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 *     OTHER DEALINGS IN THE SOFTWARE.

 */



/dts-v1/;

#include "sun50i-h5.dtsi"



#include <dt-bindings/gpio/gpio.h>

#include <dt-bindings/input/input.h>

#include <dt-bindings/pinctrl/sun4i-a10.h>



/ {

	model = "FriendlyARM NanoPi NEO Plus2";

	compatible = "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5";



	aliases {

		serial0 = &uart0;

	};



	chosen {

		stdout-path = "serial0:115200n8";

	};



	leds {

		compatible = "gpio-leds";



		pwr {

			label = "nanopi:green:pwr";

			gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;

			default-state = "on";

		};



		status {

			label = "nanopi:red:status";

			gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;

		};

	};



	reg_gmac_3v3: gmac-3v3 {

		compatible = "regulator-fixed";

		pinctrl-names = "default";

		regulator-name = "gmac-3v3";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		startup-delay-us = <100000>;

		enable-active-high;

		gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;

	};



	reg_vcc3v3: vcc3v3 {

		compatible = "regulator-fixed";

		regulator-name = "vcc3v3";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

	};



	vdd_cpux: gpio-regulator {

		compatible = "regulator-gpio";

		pinctrl-names = "default";

		regulator-name = "vdd-cpux";

		regulator-type = "voltage";

		regulator-boot-on;

		regulator-always-on;

		regulator-min-microvolt = <1100000>;

		regulator-max-microvolt = <1300000>;

		regulator-ramp-delay = <50>; /* 4ms */

		gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;

		gpios-states = <0x1>;

		states = <1100000 0x0

			  1300000 0x1>;

	};



	wifi_pwrseq: wifi_pwrseq {

		compatible = "mmc-pwrseq-simple";

		pinctrl-names = "default";

		reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */

		post-power-on-delay-ms = <200>;

	};

};



&codec {

	allwinner,audio-routing =

		"Line Out", "LINEOUT",

		"MIC1", "Mic",

		"Mic",  "MBIAS";

	status = "okay";

};



&ehci0 {

	status = "okay";

};



&ehci3 {

	status = "okay";

};



&mmc0 {

	pinctrl-names = "default";

	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;

	vmmc-supply = <&reg_vcc3v3>;

	bus-width = <4>;

	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */

	status = "okay";

};



&mmc1 {

	pinctrl-names = "default";

	pinctrl-0 = <&mmc1_pins_a>;

	vmmc-supply = <&reg_vcc3v3>;

	vqmmc-supply = <&reg_vcc3v3>;

	mmc-pwrseq = <&wifi_pwrseq>;

	bus-width = <4>;

	non-removable;

	status = "okay";



	brcmf: wifi@1 {

		reg = <1>;

		compatible = "brcm,bcm4329-fmac";

	};

};



&mmc2 {

	pinctrl-names = "default";

	pinctrl-0 = <&mmc2_8bit_pins>;

	vmmc-supply = <&reg_vcc3v3>;

	bus-width = <8>;

	non-removable;

	cap-mmc-hw-reset;

	status = "okay";

};



&ohci0 {

	status = "okay";

};



&ohci3 {

	status = "okay";

};



&uart0 {

	pinctrl-names = "default";

	pinctrl-0 = <&uart0_pins_a>;

	status = "okay";

};



&usb_otg {

	dr_mode = "host";

	status = "okay";

};



&usbphy {

	/* USB Type-A ports' VBUS is always on */

	status = "okay";

};

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