Commit adc52bf7 authored by Jerome Brunet's avatar Jerome Brunet Committed by Kevin Hilman
Browse files

arm64: dts: meson: fix mmc v2 chips max frequencies



According the datasheets, emmc v2 chips (gxbb and gxl) don't support
more that 100Mhz in UHS-1 SD modes and HS in SDIO.

Align the max-frequency to 100MHz for UHS-1 and 50MHz for HS

Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
Signed-off-by: default avatarKevin Hilman <khilman@baylibre.com>
parent b43033b1
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+2 −2
Original line number Diff line number Diff line
@@ -164,7 +164,7 @@

	bus-width = <4>;
	cap-sd-highspeed;
	max-frequency = <100000000>;
	max-frequency = <50000000>;

	non-removable;
	disable-wp;
@@ -184,7 +184,7 @@

	bus-width = <4>;
	cap-sd-highspeed;
	max-frequency = <100000000>;
	max-frequency = <50000000>;
	disable-wp;

	cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
+2 −3
Original line number Diff line number Diff line
@@ -273,7 +273,7 @@

	bus-width = <4>;
	cap-sd-highspeed;
	max-frequency = <200000000>;
	max-frequency = <50000000>;

	non-removable;
	disable-wp;
@@ -301,8 +301,7 @@
	sd-uhs-sdr12;
	sd-uhs-sdr25;
	sd-uhs-sdr50;
	sd-uhs-sdr104;
	max-frequency = <200000000>;
	max-frequency = <100000000>;
	disable-wp;

	cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
+1 −1
Original line number Diff line number Diff line
@@ -235,7 +235,7 @@

	bus-width = <4>;
	cap-sd-highspeed;
	max-frequency = <100000000>;
	max-frequency = <50000000>;
	disable-wp;

	cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
+1 −1
Original line number Diff line number Diff line
@@ -165,7 +165,7 @@

	bus-width = <4>;
	cap-sd-highspeed;
	max-frequency = <100000000>;
	max-frequency = <50000000>;

	non-removable;
	disable-wp;
+2 −2
Original line number Diff line number Diff line
@@ -126,7 +126,7 @@

	bus-width = <4>;
	cap-sd-highspeed;
	max-frequency = <100000000>;
	max-frequency = <50000000>;

	non-removable;
	disable-wp;
@@ -151,7 +151,7 @@

	bus-width = <4>;
	cap-sd-highspeed;
	max-frequency = <100000000>;
	max-frequency = <50000000>;
	disable-wp;

	cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
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