Commit adab66b7 authored by Steven Rostedt (VMware)'s avatar Steven Rostedt (VMware)
Browse files

Revert: "ring-buffer: Remove HAVE_64BIT_ALIGNED_ACCESS" 

It was believed that metag was the only architecture that required the ring
buffer to keep 8 byte words aligned on 8 byte architectures, and with its
removal, it was assumed that the ring buffer code did not need to handle
this case. It appears that sparc64 also requires this.

The following was reported on a sparc64 boot up:

   kernel: futex hash table entries: 65536 (order: 9, 4194304 bytes, linear)
   kernel: Running postponed tracer tests:
   kernel: Testing tracer function:
   kernel: Kernel unaligned access at TPC[552a20] trace_function+0x40/0x140
   kernel: Kernel unaligned access at TPC[552a24] trace_function+0x44/0x140
   kernel: Kernel unaligned access at TPC[552a20] trace_function+0x40/0x140
   kernel: Kernel unaligned access at TPC[552a24] trace_function+0x44/0x140
   kernel: Kernel unaligned access at TPC[552a20] trace_function+0x40/0x140
   kernel: PASSED

Need to put back the 64BIT aligned code for the ring buffer.

Link: https://lore.kernel.org/r/CADxRZqzXQRYgKc=y-KV=S_yHL+Y8Ay2mh5ezeZUnpRvg+syWKw@mail.gmail.com



Cc: stable@vger.kernel.org
Fixes: 86b3de60 ("ring-buffer: Remove HAVE_64BIT_ALIGNED_ACCESS")
Reported-by: default avatarAnatoly Pugachev <matorola@gmail.com>
Signed-off-by: default avatarSteven Rostedt (VMware) <rostedt@goodmis.org>
parent 74e2afc6

arch/Kconfig

+16 −0
Original line number Diff line number Diff line
@@ -143,6 +143,22 @@ config UPROBES 
	    managed by the kernel and kept transparent to the probed

	    application. )



config HAVE_64BIT_ALIGNED_ACCESS

	def_bool 64BIT && !HAVE_EFFICIENT_UNALIGNED_ACCESS

	help

	  Some architectures require 64 bit accesses to be 64 bit

	  aligned, which also requires structs containing 64 bit values

	  to be 64 bit aligned too. This includes some 32 bit

	  architectures which can do 64 bit accesses, as well as 64 bit

	  architectures without unaligned access.



	  This symbol should be selected by an architecture if 64 bit

	  accesses are required to be 64 bit aligned in this way even

	  though it is not a 64 bit architecture.



	  See Documentation/unaligned-memory-access.txt for more

	  information on the topic of unaligned memory accesses.



config HAVE_EFFICIENT_UNALIGNED_ACCESS

	bool

	help

kernel/trace/ring_buffer.c

+13 −4
Original line number Diff line number Diff line
@@ -130,7 +130,16 @@ int ring_buffer_print_entry_header(struct trace_seq *s) 
#define RB_ALIGNMENT		4U

#define RB_MAX_SMALL_DATA	(RB_ALIGNMENT * RINGBUF_TYPE_DATA_TYPE_LEN_MAX)

#define RB_EVNT_MIN_SIZE	8U	/* two 32bit words */

#define RB_ALIGN_DATA		__aligned(RB_ALIGNMENT)



#ifndef CONFIG_HAVE_64BIT_ALIGNED_ACCESS

# define RB_FORCE_8BYTE_ALIGNMENT	0

# define RB_ARCH_ALIGNMENT		RB_ALIGNMENT

#else

# define RB_FORCE_8BYTE_ALIGNMENT	1

# define RB_ARCH_ALIGNMENT		8U

#endif



#define RB_ALIGN_DATA		__aligned(RB_ARCH_ALIGNMENT)



/* define RINGBUF_TYPE_DATA for 'case RINGBUF_TYPE_DATA:' */

#define RINGBUF_TYPE_DATA 0 ... RINGBUF_TYPE_DATA_TYPE_LEN_MAX
@@ -2718,7 +2727,7 @@ rb_update_event(struct ring_buffer_per_cpu *cpu_buffer, 


	event->time_delta = delta;

	length -= RB_EVNT_HDR_SIZE;

	if (length > RB_MAX_SMALL_DATA) {

	if (length > RB_MAX_SMALL_DATA || RB_FORCE_8BYTE_ALIGNMENT) {

		event->type_len = 0;

		event->array[0] = length;

	} else
@@ -2733,11 +2742,11 @@ static unsigned rb_calculate_event_length(unsigned length) 
	if (!length)

		length++;



	if (length > RB_MAX_SMALL_DATA)

	if (length > RB_MAX_SMALL_DATA || RB_FORCE_8BYTE_ALIGNMENT)

		length += sizeof(event.array[0]);



	length += RB_EVNT_HDR_SIZE;

	length = ALIGN(length, RB_ALIGNMENT);

	length = ALIGN(length, RB_ARCH_ALIGNMENT);



	/*

	 * In case the time delta is larger than the 27 bits for it

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