Commit ad4968d5 authored by Jonathan Marek's avatar Jonathan Marek Committed by Rob Clark
Browse files

drm/msm/a6xx: enable GMU log 



This is required for a650 to work.

Signed-off-by: default avatarJonathan Marek <jonathan@marek.ca>
Reviewed-by: default avatarJordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent 02ef80c5

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

+15 −0
Original line number Diff line number Diff line
@@ -209,6 +209,12 @@ static int a6xx_gmu_start(struct a6xx_gmu *gmu) 
	u32 val;



	gmu_write(gmu, REG_A6XX_GMU_CM3_SYSRESET, 1);



	/* Set the log wptr index

	 * note: downstream saves the value in poweroff and restores it here

	 */

	gmu_write(gmu, REG_A6XX_GPU_GMU_CX_GMU_PWR_COL_CP_RESP, 0);



	gmu_write(gmu, REG_A6XX_GMU_CM3_SYSRESET, 0);



	ret = gmu_poll_timeout(gmu, REG_A6XX_GMU_CM3_FW_INIT_RESULT, val,
@@ -752,6 +758,9 @@ static int a6xx_gmu_fw_start(struct a6xx_gmu *gmu, unsigned int state) 


	gmu_write(gmu, REG_A6XX_GMU_HFI_SFR_ADDR, chipid);



	gmu_write(gmu, REG_A6XX_GPU_GMU_CX_GMU_PWR_COL_CP_MSG,

		  gmu->log.iova | (gmu->log.size / SZ_4K - 1));



	/* Set up the lowest idle level on the GMU */

	a6xx_gmu_power_config(gmu);
@@ -1057,6 +1066,7 @@ static void a6xx_gmu_memory_free(struct a6xx_gmu *gmu) 
	msm_gem_kernel_put(gmu->icache.obj, gmu->aspace, false);

	msm_gem_kernel_put(gmu->dcache.obj, gmu->aspace, false);

	msm_gem_kernel_put(gmu->dummy.obj, gmu->aspace, false);

	msm_gem_kernel_put(gmu->log.obj, gmu->aspace, false);



	gmu->aspace->mmu->funcs->detach(gmu->aspace->mmu);

	msm_gem_address_space_put(gmu->aspace);
@@ -1461,6 +1471,11 @@ int a6xx_gmu_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node) 
	if (ret)

		goto err_memory;



	/* Allocate memory for the GMU log region */

	ret = a6xx_gmu_memory_alloc(gmu, &gmu->log, SZ_4K, 0);

	if (ret)

		goto err_memory;



	/* Map the GMU registers */

	gmu->mmio = a6xx_gmu_get_mmio(pdev, "gmu");

	if (IS_ERR(gmu->mmio)) {

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

+1 −0
Original line number Diff line number Diff line
@@ -61,6 +61,7 @@ struct a6xx_gmu { 
	struct a6xx_gmu_bo icache;

	struct a6xx_gmu_bo dcache;

	struct a6xx_gmu_bo dummy;

	struct a6xx_gmu_bo log;



	int nr_clocks;

	struct clk_bulk_data *clocks;

drivers/gpu/drm/msm/adreno/a6xx_gmu.xml.h

+4 −0
Original line number Diff line number Diff line
@@ -205,6 +205,10 @@ static inline uint32_t A6XX_GMU_GPU_NAP_CTRL_SID(uint32_t val) 


#define REG_A6XX_GPU_GMU_CX_GMU_CX_FAL_INTF			0x000050f0



#define REG_A6XX_GPU_GMU_CX_GMU_PWR_COL_CP_MSG			0x00005100



#define REG_A6XX_GPU_GMU_CX_GMU_PWR_COL_CP_RESP			0x00005101



#define REG_A6XX_GMU_BOOT_KMD_LM_HANDSHAKE			0x000051f0



#define REG_A6XX_GMU_LLM_GLM_SLEEP_CTRL				0x00005157

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