Commit acca789a authored by Ido Schimmel's avatar Ido Schimmel Committed by David S. Miller
Browse files

mlxsw: spectrum: Use dedicated policer for VRRP packets 



Currently, VRRP packets and packets that hit exceptions during routing
(e.g., MTU error) are policed using the same policer towards the CPU.
This means, for example, that misconfiguration of the MTU on a routed
interface can prevent VRRP packets from reaching the CPU, which in turn
can cause the VRRP daemon to assume it is the Master router.

Fix this by using a dedicated policer for VRRP packets.

Fixes: 11566d34 ("mlxsw: spectrum: Add VRRP traps")
Signed-off-by: default avatarIdo Schimmel <idosch@mellanox.com>
Reported-by: default avatarAlex Veber <alexve@mellanox.com>
Tested-by: default avatarAlex Veber <alexve@mellanox.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 314bd842

drivers/net/ethernet/mellanox/mlxsw/reg.h

+1 −0
Original line number Diff line number Diff line
@@ -5472,6 +5472,7 @@ enum mlxsw_reg_htgt_trap_group { 
	MLXSW_REG_HTGT_TRAP_GROUP_SP_LBERROR,

	MLXSW_REG_HTGT_TRAP_GROUP_SP_PTP0,

	MLXSW_REG_HTGT_TRAP_GROUP_SP_PTP1,

	MLXSW_REG_HTGT_TRAP_GROUP_SP_VRRP,



	__MLXSW_REG_HTGT_TRAP_GROUP_MAX,

	MLXSW_REG_HTGT_TRAP_GROUP_MAX = __MLXSW_REG_HTGT_TRAP_GROUP_MAX - 1

drivers/net/ethernet/mellanox/mlxsw/spectrum.c

+7 −2
Original line number Diff line number Diff line
@@ -4542,8 +4542,8 @@ static const struct mlxsw_listener mlxsw_sp_listener[] = { 
	MLXSW_SP_RXL_MARK(ROUTER_ALERT_IPV6, TRAP_TO_CPU, ROUTER_EXP, false),

	MLXSW_SP_RXL_MARK(IPIP_DECAP_ERROR, TRAP_TO_CPU, ROUTER_EXP, false),

	MLXSW_SP_RXL_MARK(DECAP_ECN0, TRAP_TO_CPU, ROUTER_EXP, false),

	MLXSW_SP_RXL_MARK(IPV4_VRRP, TRAP_TO_CPU, ROUTER_EXP, false),

	MLXSW_SP_RXL_MARK(IPV6_VRRP, TRAP_TO_CPU, ROUTER_EXP, false),

	MLXSW_SP_RXL_MARK(IPV4_VRRP, TRAP_TO_CPU, VRRP, false),

	MLXSW_SP_RXL_MARK(IPV6_VRRP, TRAP_TO_CPU, VRRP, false),

	/* PKT Sample trap */

	MLXSW_RXL(mlxsw_sp_rx_listener_sample_func, PKT_SAMPLE, MIRROR_TO_CPU,

		  false, SP_IP2ME, DISCARD),
@@ -4626,6 +4626,10 @@ static int mlxsw_sp_cpu_policers_set(struct mlxsw_core *mlxsw_core) 
			rate = 19 * 1024;

			burst_size = 12;

			break;

		case MLXSW_REG_HTGT_TRAP_GROUP_SP_VRRP:

			rate = 360;

			burst_size = 7;

			break;

		default:

			continue;

		}
@@ -4665,6 +4669,7 @@ static int mlxsw_sp_trap_groups_set(struct mlxsw_core *mlxsw_core) 
		case MLXSW_REG_HTGT_TRAP_GROUP_SP_OSPF:

		case MLXSW_REG_HTGT_TRAP_GROUP_SP_PIM:

		case MLXSW_REG_HTGT_TRAP_GROUP_SP_PTP0:

		case MLXSW_REG_HTGT_TRAP_GROUP_SP_VRRP:

			priority = 5;

			tc = 5;

			break;

CRA Git | Maintained and supported by SUSTech CRA and CCSE