Commit acc61b89 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-next-5.5-2019-11-22' of git://people.freedesktop.org/~agd5f/linux into drm-next



drm-next-5.5-2019-11-22:

amdgpu:
- Fix bad DMA on some PPC platforms
- MMHUB fix for powergating
- BACO fix for Navi
- Misc raven fixes
- Enable vbios fetch directly from rom on navi
- debugfs fix for DC
- SR-IOV fixes for arcturus
- Misc power fixes

radeon:
- Fix bad DMA on some PPC platforms

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191122203025.3787-1-alexander.deucher@amd.com
parents e639ea0f f920d1bb
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+1 −3
Original line number Diff line number Diff line
@@ -3109,9 +3109,8 @@ void amdgpu_device_fini(struct amdgpu_device *adev)
	int r;

	DRM_INFO("amdgpu: finishing device.\n");
	adev->shutdown = true;

	flush_delayed_work(&adev->delayed_init_work);
	adev->shutdown = true;

	/* disable all interrupts */
	amdgpu_irq_disable_all(adev);
@@ -3130,7 +3129,6 @@ void amdgpu_device_fini(struct amdgpu_device *adev)
		adev->firmware.gpu_info_fw = NULL;
	}
	adev->accel_working = false;
	cancel_delayed_work_sync(&adev->delayed_init_work);
	/* free i2c buses */
	if (!amdgpu_device_has_dc_support(adev))
		amdgpu_i2c_fini(adev);
+1 −1
Original line number Diff line number Diff line
@@ -514,7 +514,7 @@ uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev,
	 * Also, don't allow GTT domain if the BO doens't have USWC falg set.
	 */
	if (adev->asic_type >= CHIP_CARRIZO &&
	    adev->asic_type <= CHIP_RAVEN &&
	    adev->asic_type < CHIP_RAVEN &&
	    (adev->flags & AMD_IS_APU) &&
	    (bo_flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC) &&
	    amdgpu_bo_support_uswc(bo_flags) &&
+4 −4
Original line number Diff line number Diff line
@@ -998,10 +998,10 @@ static const struct pci_device_id pciidlist[] = {
	{0x1002, 0x731B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
	{0x1002, 0x731F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
	/* Navi14 */
	{0x1002, 0x7340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI14|AMD_EXP_HW_SUPPORT},
	{0x1002, 0x7341, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI14|AMD_EXP_HW_SUPPORT},
	{0x1002, 0x7347, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI14|AMD_EXP_HW_SUPPORT},
	{0x1002, 0x734F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI14|AMD_EXP_HW_SUPPORT},
	{0x1002, 0x7340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI14},
	{0x1002, 0x7341, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI14},
	{0x1002, 0x7347, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI14},
	{0x1002, 0x734F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI14},

	/* Renoir */
	{0x1002, 0x1636, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RENOIR|AMD_IS_APU|AMD_EXP_HW_SUPPORT},
+0 −2
Original line number Diff line number Diff line
@@ -454,8 +454,6 @@ void amdgpu_gfx_mqd_sw_fini(struct amdgpu_device *adev)
	}

	ring = &adev->gfx.kiq.ring;
	if (adev->asic_type >= CHIP_NAVI10 && amdgpu_async_gfx_ring)
		kfree(adev->gfx.me.mqd_backup[AMDGPU_MAX_GFX_RINGS]);
	kfree(adev->gfx.mec.mqd_backup[AMDGPU_MAX_COMPUTE_RINGS]);
	amdgpu_bo_free_kernel(&ring->mqd_obj,
			      &ring->mqd_gpu_addr,
+1 −1
Original line number Diff line number Diff line
@@ -225,7 +225,7 @@ struct amdgpu_me {
	uint32_t			num_me;
	uint32_t			num_pipe_per_me;
	uint32_t			num_queue_per_pipe;
	void				*mqd_backup[AMDGPU_MAX_GFX_RINGS + 1];
	void				*mqd_backup[AMDGPU_MAX_GFX_RINGS];

	/* These are the resources for which amdgpu takes ownership */
	DECLARE_BITMAP(queue_bitmap, AMDGPU_MAX_GFX_QUEUES);
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