Commit ac3c4aa2 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull MIPS updates from James Hogan:
 "math-emu:
   - Add missing clearing of BLTZALL and BGEZALL emulation counters
   - Fix BC1EQZ and BC1NEZ condition handling
   - Fix BLEZL and BGTZL identification

  BPF:
   - Add JIT support for SKF_AD_HATYPE
   - Use unsigned access for unsigned SKB fields
   - Quit clobbering callee saved registers in JIT code
   - Fix multiple problems in JIT skb access helpers

  Loongson 3:
   - Select MIPS_L1_CACHE_SHIFT_6

  Octeon:
   - Remove vestiges of CONFIG_CAVIUM_OCTEON_2ND_KERNEL
   - Remove unused L2C types and macros.
   - Remove unused SLI types and macros.
   - Fix compile error when USB is not enabled.
   - Octeon: Remove unused PCIERCX types and macros.
   - Octeon: Clean up platform code.

  SNI:
   - Remove recursive include of cpu-feature-overrides.h

  Sibyte:
   - Export symbol periph_rev to sb1250-mac network driver.
   - Fix Kconfig warning.

  Generic platform:
   - Enable Root FS on NFS in generic_defconfig

  SMP-MT:
   - Use CPU interrupt controller IPI IRQ domain support

  UASM:
   - Add support for LHU for uasm.
   - Remove needless ISA abstraction

  mm:
   - Add 48-bit VA space and 4-level page tables for 4K pages.

  PCI:
   - Add controllers before the specified head

  irqchip driver for MIPS CPU:
   - Replace magic 0x100 with IE_SW0
   - Prepare for non-legacy IRQ domains
   - Introduce IPI IRQ domain support

  MAINTAINERS:
   - Update email-id of Rahul Bedarkar

  NET:
   - sb1250-mac: Add missing MODULE_LICENSE()

  CPUFREQ:
   - Loongson2: drop set_cpus_allowed_ptr()

  Misc:
   - Disable Werror when W= is set
   - Opt into HAVE_COPY_THREAD_TLS
   - Enable GENERIC_CPU_AUTOPROBE
   - Use common outgoing-CPU-notification code
   - Remove dead define of ST_OFF
   - Remove CONFIG_ARCH_HAS_ILOG2_U{32,64}
   - Stengthen IPI IRQ domain sanity check
   - Remove confusing else statement in __do_page_fault()
   - Don't unnecessarily include kmalloc.h into <asm/cache.h>.
   - Delete unused definition of SMP_CACHE_SHIFT.
   - Delete redundant definition of SMP_CACHE_BYTES"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (39 commits)
  MIPS: Sibyte: Fix Kconfig warning.
  MIPS: Sibyte: Export symbol periph_rev to sb1250-mac network driver.
  NET: sb1250-mac: Add missing MODULE_LICENSE()
  MAINTAINERS: Update email-id of Rahul Bedarkar
  MIPS: Remove confusing else statement in __do_page_fault()
  MIPS: Stengthen IPI IRQ domain sanity check
  MIPS: smp-mt: Use CPU interrupt controller IPI IRQ domain support
  irqchip: mips-cpu: Introduce IPI IRQ domain support
  irqchip: mips-cpu: Prepare for non-legacy IRQ domains
  irqchip: mips-cpu: Replace magic 0x100 with IE_SW0
  MIPS: Remove CONFIG_ARCH_HAS_ILOG2_U{32,64}
  MIPS: generic: Enable Root FS on NFS in generic_defconfig
  MIPS: mach-rm: Remove recursive include of cpu-feature-overrides.h
  MIPS: Opt into HAVE_COPY_THREAD_TLS
  CPUFREQ: Loongson2: drop set_cpus_allowed_ptr()
  MIPS: uasm: Remove needless ISA abstraction
  MIPS: Remove dead define of ST_OFF
  MIPS: Use common outgoing-CPU-notification code
  MIPS: math-emu: Fix BC1EQZ and BC1NEZ condition handling
  MIPS: r2-on-r6-emu: Clear BLTZALL and BGEZALL debugfs counters
  ...
parents 0ba1c195 3e441845
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+1 −1
Original line number Diff line number Diff line
@@ -7923,7 +7923,7 @@ L: linux-man@vger.kernel.org
S:	Maintained

MARDUK (CREATOR CI40) DEVICE TREE SUPPORT
M:	Rahul Bedarkar <rahul.bedarkar@imgtec.com>
M:	Rahul Bedarkar <rahulbedarkar89@gmail.com>
L:	linux-mips@linux-mips.org
S:	Maintained
F:	arch/mips/boot/dts/img/pistachio_marduk.dts
+2 −0
Original line number Diff line number Diff line
# Fail on warnings - also for files referenced in subdirs
# -Werror can be disabled for specific files using:
# CFLAGS_<file.o> := -Wno-error
ifeq ($(W),)
subdir-ccflags-y := -Werror
endif

# platform specific definitions
include arch/mips/Kbuild.platforms
+11 −13
Original line number Diff line number Diff line
@@ -46,6 +46,7 @@ config MIPS
	select ARCH_DISCARD_MEMBLOCK
	select GENERIC_SMP_IDLE_THREAD
	select BUILDTIME_EXTABLE_SORT
	select GENERIC_CPU_AUTOPROBE
	select GENERIC_CLOCKEVENTS
	select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
	select GENERIC_CMOS_UPDATE
@@ -68,6 +69,7 @@ config MIPS
	select HANDLE_DOMAIN_IRQ
	select HAVE_EXIT_THREAD
	select HAVE_REGS_AND_STACK_ACCESS_API
	select HAVE_COPY_THREAD_TLS

menu "Machine selection"

@@ -1039,14 +1041,6 @@ config RWSEM_GENERIC_SPINLOCK
config RWSEM_XCHGADD_ALGORITHM
	bool

config ARCH_HAS_ILOG2_U32
	bool
	default n

config ARCH_HAS_ILOG2_U64
	bool
	default n

config GENERIC_HWEIGHT
	bool
	default y
@@ -1372,6 +1366,7 @@ config CPU_LOONGSON3
	select WEAK_ORDERING
	select WEAK_REORDERING_BEYOND_LLSC
	select MIPS_PGD_C0_CONTEXT
	select MIPS_L1_CACHE_SHIFT_6
	select GPIOLIB
	help
		The Loongson 3 processor implements the MIPS64R2 instruction
@@ -2120,10 +2115,13 @@ config MIPS_VA_BITS_48
	bool "48 bits virtual memory"
	depends on 64BIT
	help
	  Support a maximum at least 48 bits of application virtual memory.
	  Default is 40 bits or less, depending on the CPU.
	  This option result in a small memory overhead for page tables.
	  This option is only supported with 16k and 64k page sizes.
	  Support a maximum at least 48 bits of application virtual
	  memory.  Default is 40 bits or less, depending on the CPU.
	  For page sizes 16k and above, this option results in a small
	  memory overhead for page tables.  For 4k page size, a fourth
	  level of page tables is added which imposes both a memory
	  overhead as well as slower TLB fault handling.

	  If unsure, say N.

choice
@@ -2133,7 +2131,6 @@ choice
config PAGE_SIZE_4KB
	bool "4kB"
	depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
	depends on !MIPS_VA_BITS_48
	help
	 This option select the standard 4kB Linux page size.  On some
	 R3000-family processors this is the only available page size.  Using
@@ -2982,6 +2979,7 @@ config HAVE_LATENCYTOP_SUPPORT

config PGTABLE_LEVELS
	int
	default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
	default 3 if 64BIT && !PAGE_SIZE_64KB
	default 2

+1 −1
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@@ -82,7 +82,7 @@ config CMDLINE_OVERRIDE
config SB1XXX_CORELIS
	bool "Corelis Debugger"
	depends on SIBYTE_SB1xxx_SOC
	select DEBUG_INFO
	select DEBUG_INFO if !COMPILE_TEST
	help
	  Select compile flags that produce code that can be processed by the
	  Corelis mksym utility and UDB Emulator.
+0 −9
Original line number Diff line number Diff line
@@ -25,15 +25,6 @@ endif # CPU_CAVIUM_OCTEON

if CAVIUM_OCTEON_SOC

config CAVIUM_OCTEON_2ND_KERNEL
	bool "Build the kernel to be used as a 2nd kernel on the same chip"
	default "n"
	help
	  This option configures this kernel to be linked at a different
	  address and use the 2nd uart for output. This allows a kernel built
	  with this option to be run at the same time as one built without this
	  option.

config CAVIUM_OCTEON_LOCK_L2
	bool "Lock often used kernel code in the L2"
	default "y"
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